✓ CI.checkpatch: success for drm/xe: flush engine buffers before signalling user fence on all engines

[Patchwork]

== Series Details ==

Series: drm/xe: flush engine buffers before signalling user fence on all engines
URL   : https://patchwork.freedesktop.org/series/134432/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6df5122a820231b3c83e82087250b254a4a83131
Author: Andrzej Hajda <andrzej.hajda at intel.com>
Date:   Tue Jun 4 11:38:52 2024 +0200

    drm/xe: flush engine buffers before signalling user fence on all engines
    
    Tests show that user fence signalling requires kind of write barrier,
    otherwise not all writes performed by the workload will be available
    to userspace. It is already done for render and compute, we need it
    also for the rest: video, gsc, copy.
    
    Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
    Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
+ /mt/dim checkpatch 596cf447db94909c4788fd612876520531e439b0 drm-intel
497acae83316 Revert "drm/xe: flush gtt before signalling user fence on all engines"
6df5122a8202 drm/xe: flush engine buffers before signalling user fence on all engines