[PATCH v6 6/6] drm/xe: Add reg read/write trace

[Matt Roper]

On Fri, Jun 07, 2024 at 11:29:43AM -0700, Radhakrishna Sripada wrote:
> This will help debug register read/writes and provides
> a way to trace all the mmio transactions.
> 
> v2: Fix kunit error
> v3: Print devid to help in multi-gpu setup
> v3: rebase and use variable sized variant to display
>     dev name(Gustavo)
> v4: Pass single argument to __asign_str to fix kunit error
> v5: Remove unrelated include xe_tile.h and remove cast in trace
> 
> Reviewd-by: Gustavo Sousa <gustavo.sousa at intel.com>

Fixed the typo here (missing 'e') and series applied to drm-xe-next.
Thanks for the patches and reviews.


Matt

> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_mmio.c  | 23 +++++++++++++++++++----
>  drivers/gpu/drm/xe/xe_trace.h | 28 ++++++++++++++++++++++++++++
>  2 files changed, 47 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 7962eeb9adb7..f92faad4b96d 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -21,6 +21,7 @@
>  #include "xe_gt_sriov_vf.h"
>  #include "xe_macros.h"
>  #include "xe_sriov.h"
> +#include "xe_trace.h"
>  
>  static void tiles_fini(void *arg)
>  {
> @@ -124,16 +125,24 @@ u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg)
>  {
>  	struct xe_tile *tile = gt_to_tile(gt);
>  	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
> +	u8 val;
>  
> -	return readb((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
> +	val = readb((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
> +	trace_xe_reg_rw(gt, false, addr, val, sizeof(val));
> +
> +	return val;
>  }
>  
>  u16 xe_mmio_read16(struct xe_gt *gt, struct xe_reg reg)
>  {
>  	struct xe_tile *tile = gt_to_tile(gt);
>  	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
> +	u16 val;
> +
> +	val = readw((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
> +	trace_xe_reg_rw(gt, false, addr, val, sizeof(val));
>  
> -	return readw((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
> +	return val;
>  }
>  
>  void xe_mmio_write32(struct xe_gt *gt, struct xe_reg reg, u32 val)
> @@ -141,6 +150,7 @@ void xe_mmio_write32(struct xe_gt *gt, struct xe_reg reg, u32 val)
>  	struct xe_tile *tile = gt_to_tile(gt);
>  	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
>  
> +	trace_xe_reg_rw(gt, true, addr, val, sizeof(val));
>  	writel(val, (reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
>  }
>  
> @@ -148,11 +158,16 @@ u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg)
>  {
>  	struct xe_tile *tile = gt_to_tile(gt);
>  	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
> +	u32 val;
>  
>  	if (!reg.vf && IS_SRIOV_VF(gt_to_xe(gt)))
> -		return xe_gt_sriov_vf_read32(gt, reg);
> +		val = xe_gt_sriov_vf_read32(gt, reg);
> +	else
> +		val = readl((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
> +
> +	trace_xe_reg_rw(gt, false, addr, val, sizeof(val));
>  
> -	return readl((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
> +	return val;
>  }
>  
>  u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, u32 set)
> diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
> index 27ba7c416405..09ca1ad057b0 100644
> --- a/drivers/gpu/drm/xe/xe_trace.h
> +++ b/drivers/gpu/drm/xe/xe_trace.h
> @@ -346,6 +346,34 @@ DEFINE_EVENT(xe_hw_fence, xe_hw_fence_free,
>  	     TP_ARGS(fence)
>  );
>  
> +TRACE_EVENT(xe_reg_rw,
> +	TP_PROTO(struct xe_gt *gt, bool write, u32 reg, u64 val, int len),
> +
> +	TP_ARGS(gt, write, reg, val, len),
> +
> +	TP_STRUCT__entry(
> +		__string(dev, __dev_name_gt(gt))
> +		__field(u64, val)
> +		__field(u32, reg)
> +		__field(u16, write)
> +		__field(u16, len)
> +		),
> +
> +	TP_fast_assign(
> +		__assign_str(dev);
> +		__entry->val = val;
> +		__entry->reg = reg;
> +		__entry->write = write;
> +		__entry->len = len;
> +		),
> +
> +	TP_printk("dev=%s, %s reg=0x%x, len=%d, val=(0x%x, 0x%x)",
> +		  __get_str(dev), __entry->write ? "write" : "read",
> +		  __entry->reg, __entry->len,
> +		  (u32)(__entry->val & 0xffffffff),
> +		  (u32)(__entry->val >> 32))
> +);
> +
>  #endif
>  
>  /* This part must be outside protection */
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation