[PATCH] drm/xe/guc: Move ARAT interrupts enabling to the upload step
Matthew Brost
matthew.brost at intel.com
Wed Jun 19 16:43:04 UTC 2024
On Wed, Jun 19, 2024 at 06:34:13PM +0200, Michal Wajdeczko wrote:
> Even though ARAT interrupts are enabled by default, we still want
> to keep the code that enables them. But instead doing that in the
> CTB enabling step, move this code to the upload step, where we
> already setup few other registers related to GuC.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Matthew Brost <matthew.brost at intel.com>
Reviewed-by: Matthew Brost <matthew.brost at intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 7ecb509c87d7..02c028d0e91b 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -476,6 +476,9 @@ static void guc_prepare_xfer(struct xe_guc *guc)
> xe_mmio_write32(gt, GUC_SHIM_CONTROL, shim_flags);
>
> xe_mmio_write32(gt, GT_PM_CONFIG, GT_DOORBELL_ENABLE);
> +
> + /* Make sure GuC receives ARAT interrupts */
> + xe_mmio_rmw32(gt, PMINTRMSK, ARAT_EXPIRED_INTRMSK, 0);
> }
>
> /*
> @@ -865,9 +868,6 @@ int xe_guc_enable_communication(struct xe_guc *guc)
> guc_enable_irq(guc);
> }
>
> - xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK,
> - ARAT_EXPIRED_INTRMSK, 0);
> -
> err = xe_guc_ct_enable(&guc->ct);
> if (err)
> return err;
> --
> 2.43.0
>
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