✓ CI.checkpatch: success for drm/xe: Use write-back caching mode for system memory on DGFX

Patchwork patchwork at emeril.freedesktop.org
Wed Jun 19 17:28:26 UTC 2024


== Series Details ==

Series: drm/xe: Use write-back caching mode for system memory on DGFX
URL   : https://patchwork.freedesktop.org/series/135071/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 3921167d1f56005ce008ef9198ee04c8557ba4c5
Author: Thomas Hellström <thomas.hellstrom at linux.intel.com>
Date:   Wed Jun 19 18:39:04 2024 +0200

    drm/xe: Use write-back caching mode for system memory on DGFX
    
    The caching mode for buffer objects with VRAM as a possible
    placement was forced to write-combined, regardless of placement.
    
    However, write-combined system memory is expensive to allocate and
    even though it is pooled, the pool is expensive to shrink, since
    it involves global CPU TLB flushes.
    
    Moreover write-combined system memory from TTM is only reliably
    available on x86 and DGFX doesn't have an x86 restriction.
    
    So regardless of the cpu caching mode selected for a bo,
    internally use write-back caching mode for system memory on DGFX.
    
    Coherency is maintained, but user-space clients may perceive a
    difference in cpu access speeds.
    
    Signed-off-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
    Fixes: 622f709ca629 ("drm/xe/uapi: Add support for CPU caching mode")
    Cc: Pallavi Mishra <pallavi.mishra at intel.com>
    Cc: Matthew Auld <matthew.auld at intel.com>
    Cc: dri-devel at lists.freedesktop.org
    Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
    Cc: Effie Yu <effie.yu at intel.com>
    Cc: Matthew Brost <matthew.brost at intel.com>
    Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
    Cc: Jose Souza <jose.souza at intel.com>
    Cc: Michal Mrozek <michal.mrozek at intel.com>
    Cc: <stable at vger.kernel.org> # v6.8+
+ /mt/dim checkpatch 66d8ec4c6e7d124a021a3a8d038ed9e739cc9359 drm-intel
3921167d1f56 drm/xe: Use write-back caching mode for system memory on DGFX




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