✓ CI.checkpatch: success for drm/xe/guc: Configure TLB timeout based on CT buffer size (rev3)

[Patchwork]

== Series Details ==

Series: drm/xe/guc: Configure TLB timeout based on CT buffer size (rev3)
URL   : https://patchwork.freedesktop.org/series/135341/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 80e7f9c35ba41fa9a65d0825610606e74001d5b5
Author: Nirmoy Das <nirmoy.das at intel.com>
Date:   Wed Jun 26 17:01:09 2024 +0200

    drm/xe/guc: Configure TLB timeout based on CT buffer size
    
    GuC TLB invalidation depends on GuC to process the request from the CT
    queue and then the real time to invalidate TLB. Add a function to return
    overestimated possible time a TLB inval H2G might take which can be used
    as timeout value for TLB invalidation wait time.
    
    v3: Pass CT to xe_guc_ct_queue_proc_time_jiffies() (Michal)
        Add tlb_timeout_jiffies() that replaces TLB_TIMEOUT(Michal)
    v2: Address reviews from Michal.
    
    Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1622
    Cc: Matthew Brost <matthew.brost at intel.com>
    Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
    Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
    Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
+ /mt/dim checkpatch 4c0d405d05e222df53e25ac195ef9979ff13ffff drm-intel
80e7f9c35ba4 drm/xe/guc: Configure TLB timeout based on CT buffer size