✓ CI.checkpatch: success for series starting with [1/2] drm/xe: Remove unused FF_SLICE_CS_CHICKEN2

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/xe: Remove unused FF_SLICE_CS_CHICKEN2
URL   : https://patchwork.freedesktop.org/series/130825/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
7d6fb25447372de10c7d82d450bf95e4b2e2a0ab
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f1fa2a50ad6a758b35c6f8f6460ae791e467b100
Author: Lucas De Marchi <lucas.demarchi at intel.com>
Date:   Wed Mar 6 11:21:28 2024 -0800

    drm/xe/pvc: Fix WA 18020744125
    
    With the current state GUC_WA_RCS_REGS_IN_CCS_REGS_LIST could in theory
    be removed since there is no render register being added to the list of
    compute WAs. However the real issue is that 18020744125 is incomplete
    and not setting the RING_HWSTAM on render as it should.
    
    Writing this in RTP is a little more tricky as we want to write to
    another's engine base when the match happens: first compute engine and
    no render present. So use RING_HWSTAM(RENDER_RING_BASE) instead of the
    usual XE_RTP_ACTION_FLAG(ENGINE_BASE).
    
    Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
+ /mt/dim checkpatch e96742a33719079709b8e180448b491622e6a427 drm-intel
f5d7a2cb7391 drm/xe: Remove unused FF_SLICE_CS_CHICKEN2
f1fa2a50ad6a drm/xe/pvc: Fix WA 18020744125