[PATCH xe-for-ci] drm/xe/pvc: fix CI GuC FW path
Daniele Ceraolo Spurio
daniele.ceraolospurio at intel.com
Fri Mar 8 13:42:02 UTC 2024
The new repo flow has the CI firmwares located under the intel-ci/
folder, so we need to update the path in the driver. This messes a bit
with the formatting, but since this is a CI-only patch it doesn't really
matter.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Cc: Lucas De Marchi <lucas.demarchi at intel.com>
Cc: John Harrison <John.C.Harrison at Intel.com>
Cc: Gustavo Sousa <gustavo.sousa at intel.com>
---
This patch can be squashed in the existing fw definition patch
drivers/gpu/drm/xe/xe_uc_fw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 7751d6ba6ce0..44b8c5f58fd8 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -105,7 +105,7 @@ struct fw_blobs_by_type {
#define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver, major_ver) \
fw_def(LUNARLAKE, major_ver(xe, guc, lnl, 70, 19, 2)) \
fw_def(METEORLAKE, major_ver(i915, guc, mtl, 70, 19, 2)) \
- fw_def(PVC, mmp_ver(xe, guc, pvc, 70, 20, 0)) \
+ fw_def(PVC, mmp_ver(intel-ci/xe, guc, pvc, 70, 20, 0)) \
fw_def(DG2, major_ver(i915, guc, dg2, 70, 19, 2)) \
fw_def(DG1, major_ver(i915, guc, dg1, 70, 19, 2)) \
fw_def(ALDERLAKE_N, major_ver(i915, guc, tgl, 70, 19, 2)) \
--
2.43.0
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