[PATCH 15/17] drm/xe/oa: Override GuC RC with OA on PVC
Ashutosh Dixit
ashutosh.dixit at intel.com
Tue Mar 12 03:39:14 UTC 2024
On PVC, a w/a resets RCS/CCS before it goes into RC6. This breaks OA since
OA does not expect engine resets during its use. Fix it by disabling RC6.
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
---
drivers/gpu/drm/xe/xe_guc_pc.c | 56 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_pc.h | 3 ++
drivers/gpu/drm/xe/xe_oa.c | 25 +++++++++++++-
drivers/gpu/drm/xe/xe_oa_types.h | 3 ++
4 files changed, 86 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index f4b031b8d9de..89be1ad31de0 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -209,6 +209,27 @@ static int pc_action_set_param(struct xe_guc_pc *pc, u8 id, u32 value)
return ret;
}
+static int pc_action_unset_param(struct xe_guc_pc *pc, u8 id)
+{
+ struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
+ int ret;
+ u32 action[] = {
+ GUC_ACTION_HOST2GUC_PC_SLPC_REQUEST,
+ SLPC_EVENT(SLPC_EVENT_PARAMETER_UNSET, 1),
+ id,
+ };
+
+ if (wait_for_pc_state(pc, SLPC_GLOBAL_STATE_RUNNING))
+ return -EAGAIN;
+
+ ret = xe_guc_ct_send(ct, action, ARRAY_SIZE(action), 0, 0);
+ if (ret)
+ drm_err(&pc_to_xe(pc)->drm, "GuC PC unset param failed: %pe",
+ ERR_PTR(ret));
+
+ return ret;
+}
+
static int pc_action_setup_gucrc(struct xe_guc_pc *pc, u32 mode)
{
struct xe_guc_ct *ct = &pc_to_guc(pc)->ct;
@@ -787,6 +808,41 @@ int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc)
return 0;
}
+/**
+ * xe_guc_pc_override_gucrc_mode - override GUCRC mode
+ * @pc: Xe_GuC_PC instance
+ * @mode: new value of the mode.
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode)
+{
+ int ret;
+
+ xe_device_mem_access_get(pc_to_xe(pc));
+ ret = pc_action_set_param(pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
+ xe_device_mem_access_put(pc_to_xe(pc));
+
+ return ret;
+}
+
+/**
+ * xe_guc_pc_unset_gucrc_mode - unset GUCRC mode override
+ * @pc: Xe_GuC_PC instance
+ *
+ * Return: 0 on success, negative error code on error
+ */
+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc)
+{
+ int ret;
+
+ xe_device_mem_access_get(pc_to_xe(pc));
+ ret = pc_action_unset_param(pc, SLPC_PARAM_PWRGATE_RC_MODE);
+ xe_device_mem_access_put(pc_to_xe(pc));
+
+ return ret;
+}
+
static void pc_init_pcode_freq(struct xe_guc_pc *pc)
{
u32 min = DIV_ROUND_CLOSEST(pc->rpn_freq, GT_FREQUENCY_MULTIPLIER);
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.h b/drivers/gpu/drm/xe/xe_guc_pc.h
index d3680d89490e..306c8ff3eb05 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.h
+++ b/drivers/gpu/drm/xe/xe_guc_pc.h
@@ -7,11 +7,14 @@
#define _XE_GUC_PC_H_
#include "xe_guc_pc_types.h"
+#include "abi/guc_actions_slpc_abi.h"
int xe_guc_pc_init(struct xe_guc_pc *pc);
int xe_guc_pc_start(struct xe_guc_pc *pc);
int xe_guc_pc_stop(struct xe_guc_pc *pc);
int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
+int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
+int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index 8b62ce6265a8..b33976db1da5 100644
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -21,6 +21,7 @@
#include "xe_bo.h"
#include "xe_gt.h"
#include "xe_gt_mcr.h"
+#include "xe_guc_pc.h"
#include "xe_lrc.h"
#include "xe_mmio.h"
#include "xe_oa.h"
@@ -784,6 +785,10 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
xe_device_mem_access_put(stream->oa->xe);
xe_oa_free_oa_buffer(stream);
+ /* Wa_1509372804:pvc: Unset the override of GUCRC mode to enable rc6 */
+ if (stream->override_gucrc)
+ XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
+
xe_oa_free_configs(stream);
}
@@ -1265,9 +1270,24 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
goto exit;
}
+ /*
+ * Wa_1509372804:pvc
+ *
+ * GuC reset of engines causes OA to lose configuration
+ * state. Prevent this by overriding GUCRC mode.
+ */
+ if (stream->oa->xe->info.platform == XE_PVC) {
+ ret = xe_guc_pc_override_gucrc_mode(>->uc.guc.pc,
+ SLPC_GUCRC_MODE_GUCRC_NO_RC6);
+ if (ret)
+ goto err_free_configs;
+
+ stream->override_gucrc = true;
+ }
+
ret = xe_oa_alloc_oa_buffer(stream);
if (ret)
- goto err_free_configs;
+ goto err_unset_gucrc;
/* Take runtime pm ref and forcewake to disable RC6 */
xe_device_mem_access_get(stream->oa->xe);
@@ -1310,6 +1330,9 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
xe_device_mem_access_put(stream->oa->xe);
xe_oa_free_oa_buffer(stream);
+err_unset_gucrc:
+ if (stream->override_gucrc)
+ XE_WARN_ON(xe_guc_pc_unset_gucrc_mode(>->uc.guc.pc));
err_free_configs:
xe_oa_free_configs(stream);
exit:
diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index b58b4f59f40b..6984e7d04be5 100644
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -219,5 +219,8 @@ struct xe_oa_stream {
/** @poll_period_ns: hrtimer period for checking OA buffer for available data */
u64 poll_period_ns;
+
+ /** @override_gucrc: GuC RC has been overridden for the OA stream */
+ bool override_gucrc;
};
#endif
--
2.41.0
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