[PATCH] drm/xe/xelpg: Add Wa_14020495402

[Matt Roper]

On Mon, Mar 18, 2024 at 12:37:06PM -0700, Radhakrishna Sripada wrote:
> Disable clockgating for TDL SVHS fub.
> 
> Bspec: 46045
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
>  drivers/gpu/drm/xe/xe_wa.c           | 5 +++++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 15ac2d284d48..acf7bbe8cc8d 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -364,6 +364,7 @@
>  #define   DISABLE_EARLY_READ			REG_BIT(14)
>  #define   ENABLE_LARGE_GRF_MODE			REG_BIT(12)
>  #define   PUSH_CONST_DEREF_HOLD_DIS		REG_BIT(8)
> +#define   DISABLE_TDL_SVHS_GATING		REG_BIT(1)
>  #define   DISABLE_DOP_GATING			REG_BIT(0)
>  
>  #define RT_CTRL					XE_REG_MCR(0xe530)
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 2460c570e628..6ab06f029aa9 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -396,6 +396,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>  	  XE_RTP_ACTIONS(SET(XEHP_HDC_CHICKEN0, DIS_ATOMIC_CHAINING_TYPED_WRITES,
>  			     XE_RTP_NOCHECK))
>  	},
> +	{ XE_RTP_NAME("14020495402"),
> +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1270, 1271),

While this workaround is only finalized for 12.70 and 12.71 right now,
it looks like it's trending to be included for 12.74 as well.  You might
want to ping the hardware team to confirm whether this should be applied
to Xe_LPG+ as well.

Assuming we get confirmation on 12.74,

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>


Matt

> +		       FUNC(xe_rtp_match_first_render_or_compute)),
> +	  XE_RTP_ACTIONS(SET(ROW_CHICKEN2, DISABLE_TDL_SVHS_GATING))
> +	},
>  
>  	/* Xe2_LPG */
>  
> -- 
> 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation