✓ CI.checkpatch: success for drm/xe/uc: Use u64 for offsets for which we use upper_32_bits()

[Patchwork]

== Series Details ==

Series: drm/xe/uc: Use u64 for offsets for which we use upper_32_bits()
URL   : https://patchwork.freedesktop.org/series/131282/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
a9eb1ac8298ef9f9146567c29fa762d8e9efa1ef
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 47f20d7b9edcaf57a480097983f37aa0e4305081
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date:   Mon Mar 18 11:42:25 2024 -0700

    drm/xe/uc: Use u64 for offsets for which we use upper_32_bits()
    
    The GGTT is currently a 32 bit address space, but the HW and GuC
    support 48b addresses in GGTT-related operations, both to keep the
    interface/HW paths common between PPGTT and GGTT and to allow for
    future increase of the GGTT size.
    This leaves us having to program a 64b field with a 32b offset, which
    currently we're in some cases doing this by using an upper_32_bits()
    call on a 32b variable, which doesn't make any sense. To do this cleanly
    we have 2 options:
    
    1 - Set the upper 32 bits directly to zero.
    2 - Use 64b variables for the offset and keep programming the whole thing,
        so we're ready if we ever have bigger offsets.
    
    This patch goes with option #2 and switches the related variables to u64.
    
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
    Cc: John Harrison <John.C.Harrison at Intel.com>
+ /mt/dim checkpatch e8f2ef9ff5486b3bbfc599bf89e10e3bdecd96b9 drm-intel
47f20d7b9edc drm/xe/uc: Use u64 for offsets for which we use upper_32_bits()