[PATCH 2/2] drm/xe/hwmon: Fix static analysis tool reported issues

[Poosa, Karthik]

Please find replies inline.

On 21-03-2024 18:30, Jani Nikula wrote:
> On Thu, 21 Mar 2024, Karthik Poosa <karthik.poosa at intel.com> wrote:
>> Update xe hwmon with fixes for issues reported by static analysis
>> tool.
>> Fix integer overflow with upcasting.
>> Initialize uninitialized variables.
>>
>> Fixes: 4446fcf220ce ("drm/xe/hwmon: Expose power1_max_interval")
>> Signed-off-by: Karthik Poosa <karthik.poosa at intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_hwmon.c | 18 +++++++++---------
>>   1 file changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
>> index a256af8c2012..6ed9d5c4f6b1 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -153,7 +153,7 @@ static void xe_hwmon_process_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg hwmon
>>    */
>>   static void xe_hwmon_power_max_read(struct xe_hwmon *hwmon, long *value)
>>   {
>> -	u64 reg_val, min, max;
>> +	u64 reg_val = 0, min, max;
> Nah. Just fix xe_hwmon_process_reg() to set *value = 0.
I think the caller has to ensure value is set to 0, it is not needed in 
xe_hwmon_process_reg.
> Side note, xe_hwmon_get_reg() should return struct xe_reg instead of
> u32, and xe_hwmon_process_reg() has no business looking into the guts of
> struct xe_reg.
>
>
> BR,
> Jani.
>
That change is not related to this patch series. It will be a major 
change which will be handled in another patch series.

>>   
>>   	mutex_lock(&hwmon->hwmon_lock);
>>   
>> @@ -182,7 +182,7 @@ static void xe_hwmon_power_max_read(struct xe_hwmon *hwmon, long *value)
>>   static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, long value)
>>   {
>>   	int ret = 0;
>> -	u64 reg_val;
>> +	u64 reg_val = 0;
>>   
>>   	mutex_lock(&hwmon->hwmon_lock);
>>   
>> @@ -212,7 +212,7 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, long value)
>>   
>>   static void xe_hwmon_power_rated_max_read(struct xe_hwmon *hwmon, long *value)
>>   {
>> -	u64 reg_val;
>> +	u64 reg_val = 0;
>>   
>>   	xe_hwmon_process_reg(hwmon, REG_PKG_POWER_SKU, REG_READ32, &reg_val, 0, 0);
>>   	reg_val = REG_FIELD_GET(PKG_TDP, reg_val);
>> @@ -243,7 +243,7 @@ static void
>>   xe_hwmon_energy_get(struct xe_hwmon *hwmon, long *energy)
>>   {
>>   	struct xe_hwmon_energy_info *ei = &hwmon->ei;
>> -	u64 reg_val;
>> +	u64 reg_val = 0;
>>   
>>   	xe_hwmon_process_reg(hwmon, REG_PKG_ENERGY_STATUS, REG_READ32,
>>   			     &reg_val, 0, 0);
>> @@ -264,8 +264,8 @@ xe_hwmon_power1_max_interval_show(struct device *dev, struct device_attribute *a
>>   				  char *buf)
>>   {
>>   	struct xe_hwmon *hwmon = dev_get_drvdata(dev);
>> -	u32 x, y, x_w = 2; /* 2 bits */
>> -	u64 r, tau4, out;
>> +	u32 x = 0, y = 0, x_w = 2; /* 2 bits */
>> +	u64 r = 0, tau4, out;
>>   
>>   	xe_pm_runtime_get(gt_to_xe(hwmon->gt));
>>   
>> @@ -291,7 +291,7 @@ xe_hwmon_power1_max_interval_show(struct device *dev, struct device_attribute *a
>>   	 * As y can be < 2, we compute tau4 = (4 | x) << y
>>   	 * and then add 2 when doing the final right shift to account for units
>>   	 */
>> -	tau4 = ((1 << x_w) | x) << y;
>> +	tau4 = (u64)((1 << x_w) | x) << y;
>>   
>>   	/* val in hwmon interface units (millisec) */
>>   	out = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
>> @@ -331,7 +331,7 @@ xe_hwmon_power1_max_interval_store(struct device *dev, struct device_attribute *
>>   	r = FIELD_PREP(PKG_MAX_WIN, PKG_MAX_WIN_DEFAULT);
>>   	x = REG_FIELD_GET(PKG_MAX_WIN_X, r);
>>   	y = REG_FIELD_GET(PKG_MAX_WIN_Y, r);
>> -	tau4 = ((1 << x_w) | x) << y;
>> +	tau4 = (u64)((1 << x_w) | x) << y;
>>   	max_win = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
>>   
>>   	if (val > max_win)
>> @@ -466,7 +466,7 @@ static int xe_hwmon_power_curr_crit_write(struct xe_hwmon *hwmon, long value, u3
>>   
>>   static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, long *value)
>>   {
>> -	u64 reg_val;
>> +	u64 reg_val = 0;
>>   
>>   	xe_hwmon_process_reg(hwmon, REG_GT_PERF_STATUS,
>>   			     REG_READ32, &reg_val, 0, 0);