✓ CI.checkpatch: success for drm/xe/gsc: Implement WA 14018094691 (rev2)

[Patchwork]

== Series Details ==

Series: drm/xe/gsc: Implement WA 14018094691 (rev2)
URL   : https://patchwork.freedesktop.org/series/131390/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
a9eb1ac8298ef9f9146567c29fa762d8e9efa1ef
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 10533acd6691aa07123d565526f4fb3cbe489b54
Author: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Date:   Tue Mar 26 15:44:56 2024 -0700

    drm/xe/gsc: Implement WA 14018094691
    
    The WA states that we need to keep the primary GT powered up during GSC
    load to allow the GSC FW to access its registers. We also need to make
    sure that one of the registers is locked before starting the load.
    
    v2: fix location of register def (Matt)
    
    Bspec: 55928
    Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
    Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
+ /mt/dim checkpatch e25b0894a9fee6e49385970715c1d5299bb08db8 drm-intel
10533acd6691 drm/xe/gsc: Implement WA 14018094691