[PATCH 1/4] drm/xe: Minor cleanup in LRC handling

Ghimiray, Himal Prasad himal.prasad.ghimiray at intel.com
Mon May 6 04:30:03 UTC 2024


On 05-05-2024 05:04, Niranjana Vishwanathapura wrote:
> Properly define register fields and remove redundant
> lower_32_bits().
>
> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura at intel.com>
> ---
>   drivers/gpu/drm/xe/regs/xe_engine_regs.h | 4 ++--
>   drivers/gpu/drm/xe/xe_lrc.c              | 2 +-
>   2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 97d2aed63e01..7e1b0fd68275 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -44,9 +44,10 @@
>   #define GSCCS_RING_BASE				0x11a000
>   
>   #define RING_TAIL(base)				XE_REG((base) + 0x30)
> +#define   TAIL_ADDR				REG_GENMASK(20, 3)
>   
>   #define RING_HEAD(base)				XE_REG((base) + 0x34)
> -#define   HEAD_ADDR				0x001FFFFC
> +#define   HEAD_ADDR				REG_GENMASK(20, 2)
>   
>   #define RING_START(base)			XE_REG((base) + 0x38)
>   
> @@ -136,7 +137,6 @@
>   #define   RING_VALID_MASK			0x00000001
>   #define   RING_VALID				0x00000001
>   #define   STOP_RING				REG_BIT(8)
> -#define   TAIL_ADDR				0x001FFFF8
>   
>   #define RING_CTX_TIMESTAMP(base)		XE_REG((base) + 0x3a8)
>   #define CSBE_DEBUG_STATUS(base)			XE_REG((base) + 0x3fc)
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 2066d34ddf0b..f759f4c10914 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -1354,7 +1354,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
>   	if (!snapshot)
>   		return NULL;
>   
> -	snapshot->context_desc = lower_32_bits(xe_lrc_ggtt_addr(lrc));
> +	snapshot->context_desc = xe_lrc_ggtt_addr(lrc);


Patch LGTM

  Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>


>   	snapshot->head = xe_lrc_ring_head(lrc);
>   	snapshot->tail.internal = lrc->ring.tail;
>   	snapshot->tail.memory = xe_lrc_read_ctx_reg(lrc, CTX_RING_TAIL);


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