✓ CI.checkpatch: success for drm/xe: flush gtt before signalling user fence on all engines (rev2)

[Patchwork]

== Series Details ==

Series: drm/xe: flush gtt before signalling user fence on all engines (rev2)
URL   : https://patchwork.freedesktop.org/series/133906/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit cc2cfbaa41a534cd143f2cd7beca74025003310d
Author: Andrzej Hajda <andrzej.hajda at intel.com>
Date:   Wed May 22 09:27:27 2024 +0200

    drm/xe: flush gtt before signalling user fence on all engines
    
    Tests show that user fence signalling requires kind of write barrier,
    otherwise not all writes performed by the workload will be available
    to userspace. It is already done for render and compute, we need it
    also for the rest: video, gsc, copy.
    
    v2: added gsc and copy engines, added fixes and r-b tags
    
    Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1488
    Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
    Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
    Reviewed-by: Matthew Brost <matthew.brost at intel.com>
+ /mt/dim checkpatch 573842e9ab57ccd8d6bb68ad55ed2e012e3d5d2f drm-intel
cc2cfbaa41a5 drm/xe: flush gtt before signalling user fence on all engines