[PATCH] drm/xe/xe2: Enable Priority Mem Read
Pallavi Mishra
pallavi.mishra at intel.com
Sat May 25 00:49:33 UTC 2024
Enable feature to allow memory reads to take a
priority memory path. This will reduce latency
on the read path, but may introduce RAW hazards.
Bspec: 45845, 60237, 60187, 60188
Signed-off-by: Pallavi Mishra <pallavi.mishra at intel.com>
---
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 1 +
drivers/gpu/drm/xe/xe_hw_engine.c | 7 +++++++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 263ffc7bc2ef..4e8f9a61f0bf 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -104,6 +104,7 @@
#define CSFE_CHICKEN1(base) XE_REG((base) + 0xd4, XE_REG_OPTION_MASKED)
#define GHWSP_CSB_REPORT_DIS REG_BIT(15)
#define PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS REG_BIT(14)
+#define CS_PRIORITY_MEM_READ REG_BIT(7)
#define FF_SLICE_CS_CHICKEN1(base) XE_REG((base) + 0xe0, XE_REG_OPTION_MASKED)
#define FFSC_PERCTX_PREEMPT_CTRL REG_BIT(14)
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index de1aefaa2335..34aa8b5270b0 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -424,6 +424,13 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe)
0xA,
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
},
+ /* Enable Priority Mem Read */
+ { XE_RTP_NAME("Priority_Mem_Read"),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2000, 2004)),
+ XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
+ CS_PRIORITY_MEM_READ)),
+ XE_RTP_ACTION_FLAG(ENGINE_BASE),
+ },
{}
};
--
2.25.1
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