✗ CI.checkpatch: warning for drm/xe: Add device CXL capabilities identification (rev2)

[Patchwork]

== Series Details ==

Series: drm/xe: Add device CXL capabilities identification (rev2)
URL   : https://patchwork.freedesktop.org/series/134047/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 8ed8c7ba378d5626ab937c3dd58dccf48db020b9
Author: Farah Kassabri <fkassabri at habana.ai>
Date:   Sun May 26 16:02:54 2024 +0300

    drm/xe: Add device CXL capabilities identification
    
    As future Intel GPUs will use CXL interface with the host
    servers, this patch will add check if the xe device has CXL
    capabilities or not, by reading the PCIe standard DVSEC register
    and identify the CXL vendor id.
    
    Signed-off-by: Farah Kassabri <fkassabri at habana.ai>
    Reviewed by: Wajdeczko, Michal <Michal.Wajdeczko at intel.com>
+ /mt/dim checkpatch 573842e9ab57ccd8d6bb68ad55ed2e012e3d5d2f drm-intel
8ed8c7ba378d drm/xe: Add device CXL capabilities identification
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in <module>
    from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in <module>
    from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:36: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#36: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 115 lines checked