✗ CI.checkpatch: warning for drm/xe: Add device CXL capabilities identification (rev3)
Patchwork
patchwork at emeril.freedesktop.org
Mon May 27 08:46:17 UTC 2024
== Series Details ==
Series: drm/xe: Add device CXL capabilities identification (rev3)
URL : https://patchwork.freedesktop.org/series/134047/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
51ce9f6cd981d42d7467409d7dbc559a450abc1e
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 22e9dbbba0e9434378b90854ad98d51e971c38bc
Author: Farah Kassabri <fkassabri at habana.ai>
Date: Mon May 27 11:40:31 2024 +0300
drm/xe: Add device CXL capabilities identification
As future Intel GPUs will use CXL interface with the host
servers, this patch will add check if the xe device has CXL
capabilities or not, by reading the PCIe standard DVSEC register
and identify the CXL vendor id.
Signed-off-by: Farah Kassabri <fkassabri at habana.ai>
+ /mt/dim checkpatch 3735266734803d913dd698230e05c462806525aa drm-intel
22e9dbbba0e9 drm/xe: Add device CXL capabilities identification
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:26: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#26:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 110 lines checked
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