[PATCH] drm/xe: Don't refer to general LRC initialization as a "wa"
Gustavo Sousa
gustavo.sousa at intel.com
Mon May 27 13:51:53 UTC 2024
Quoting Matt Roper (2024-05-24 20:04:45-03:00)
>During engine LRC initialization a number of registers need to be
>programmed as general setup. This programming is not a "workaround" so
>naming the RTP table as "lrc_was" is misleading; switch to the name
>"lrc_setup" to more accurately describe what the table is actually for.
>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa at intel.com>
>---
> drivers/gpu/drm/xe/xe_hw_engine.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
>index de1aefaa2335..9eef789be897 100644
>--- a/drivers/gpu/drm/xe/xe_hw_engine.c
>+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
>@@ -342,7 +342,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
> u32 blit_cctl_val = REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, mocs_write_idx) |
> REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, mocs_read_idx);
> struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe);
>- const struct xe_rtp_entry_sr lrc_was[] = {
>+ const struct xe_rtp_entry_sr lrc_setup[] = {
> /*
> * Some blitter commands do not have a field for MOCS, those
> * commands will use MOCS index pointed by BLIT_CCTL.
>@@ -374,7 +374,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
> {}
> };
>
>- xe_rtp_process_to_sr(&ctx, lrc_was, &hwe->reg_lrc);
>+ xe_rtp_process_to_sr(&ctx, lrc_setup, &hwe->reg_lrc);
> }
>
> static void
>--
>2.45.0
>
More information about the Intel-xe
mailing list