[PATCH] drm/xe/xe2lpm: Add Wa_15015404425

[Cavitt, Jonathan]

-----Original Message-----
From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Tejas Upadhyay
Sent: Thursday, May 23, 2024 11:32 PM
To: intel-xe at lists.freedesktop.org
Cc: Upadhyay, Tejas <tejas.upadhyay at intel.com>
Subject: [PATCH] drm/xe/xe2lpm: Add Wa_15015404425
> 
> Wa_15015404425 applies to xe2_lpm all steppings
> 
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_regs.h |  1 +
>  drivers/gpu/drm/xe/xe_mmio.c      | 18 ++++++++++++++++++
>  2 files changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
> index 722fb6dbb72e..07c8a23bd7c2 100644
> --- a/drivers/gpu/drm/xe/regs/xe_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_regs.h
> @@ -42,6 +42,7 @@
>  #define STOLEN_RESERVED				XE_REG(0x1082c0)
>  #define   WOPCM_SIZE_MASK			REG_GENMASK64(9, 7)
>  
> +#define MEDIA_DUMMY_REG				XE_REG(0x138000)
>  #define MTL_RP_STATE_CAP			XE_REG(0x138000)
>  
>  #define MTL_GT_RPE_FREQUENCY			XE_REG(0x13800c)
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index ff7a7cf99530..e1dc87078387 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -450,6 +450,21 @@ int xe_mmio_init(struct xe_device *xe)
>  	return devm_add_action_or_reset(xe->drm.dev, mmio_fini, xe);
>  }
>  
> +static void mmio_flush_pending_writes(struct xe_gt *gt)
> +{
> +	struct xe_device *xe = gt_to_xe(gt);
> +
> +	if (!(xe->info.platform == XE_LUNARLAKE))
> +		return;
> +
> +	if (xe_gt_is_media_type(gt) &&  MEDIA_VER(xe) == 20) {

IMO it might be better to combine both checks into one, I.E.:
	If (xe->info.platform == XE_LUNARLAKE &&
	    xe_gt_is_media_type(gt) && MEDIA_VER(xe) == 20) {

To that end, it might be better to have a boolean helper function
for this purpose, such as xe_gt_needs_mmio_pending_write_flush()
or xe_gt_needs_wa_15015404425()

I won't block on it, though.
Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
-Jonathan Cavitt

> +		int itr = 4;
> +		/* 4 dummy writes */
> +		while (itr--)
> +			xe_mmio_write32(gt, MEDIA_DUMMY_REG, 0);
> +	}
> +}
> +
>  u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg)
>  {
>  	struct xe_tile *tile = gt_to_tile(gt);
> @@ -479,6 +494,9 @@ u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg)
>  	struct xe_tile *tile = gt_to_tile(gt);
>  	u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
>  
> +	/* Wa_15015404425 */
> +	mmio_flush_pending_writes(gt);
> +
>  	return readl((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
>  }
>  
> -- 
> 2.25.1
> 
>