[PATCH] drm/i915/dp: Limit max compressed bpp to 18 when forcing DSC

[Srikanth V, NagaVenkata]

Looks good to me.

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Ankit
> Nautiyal
> Sent: Wednesday, October 30, 2024 2:11 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: intel-xe at lists.freedesktop.org
> Subject: [PATCH] drm/i915/dp: Limit max compressed bpp to 18 when
> forcing DSC
> 
> While forcing DSC when it is not actually required, the max compressed bpp
> from the source gets picked for compression for some pipe bpps.
> Apparently, when DSC is not required, forcing DSC to the maximum
> compressed bpp seems to cause underruns.
> 
> To avoid this, limit the max compressed bpp to 18 while forcing DSC. This
> value works across platforms with different pipe bpps and prevents
> underruns.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 28fa5e2d0c33..0ce29cefaa13 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2021,6 +2021,15 @@ static int dsc_src_max_compressed_bpp(struct
> intel_dp *intel_dp)  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> 
> +	/*
> +	 * Forcing DSC and using the platform's max compressed bpp is seen
> to cause
> +	 * underruns. Since DSC isn't needed in these cases, limit the
> +	 * max compressed bpp to 18, which is a safe value across platforms
> with different
> +	 * pipe bpps.
> +	 */
> +	if (intel_dp->force_dsc_en)
> +		return 18;
> +
>  	/*
>  	 * Max Compressed bpp for Gen 13+ is 27bpp.
>  	 * For earlier platform is 23bpp. (Bspec:49259).
> --
> 2.45.2