[PATCH 2/3] drm/xe/pmu: Add GT C6 events
Raag Jadav
raag.jadav at intel.com
Wed Nov 13 04:12:15 UTC 2024
On Tue, Nov 12, 2024 at 12:51:41PM -0800, Vinay Belgaumkar wrote:
> Provide a PMU interface for GT C6 residency counters. The implementation
> is ported over from the i915 PMU code. Residency is provided in units of
> ms(like sysfs entry in - /sys/class/drm/card0/device/tile0/gt0/gtidle).
>
> Sample usage and output-
>
> $ perf list | grep c6
>
> xe_0000_00_02.0/c6-residency-gt0/ [Kernel PMU event]
> xe_0000_00_02.0/c6-residency-gt1/ [Kernel PMU event]
Is it possible to do per gt?
<bdf>/gt<n>/c6-residency
Raag
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