✓ CI.checkpatch: success for drm/i915/display/xe3lpd: Avoid setting YUV420_MODE in PIPE_MISC

[Patchwork]

== Series Details ==

Series: drm/i915/display/xe3lpd: Avoid setting YUV420_MODE in PIPE_MISC
URL   : https://patchwork.freedesktop.org/series/141284/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 87bc96a6fd633f8994846dc60bb33d02f166ea3a
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Wed Nov 13 17:25:31 2024 +0530

    drm/i915/display/xe3lpd: Avoid setting YUV420_MODE in PIPE_MISC
    
    For Xe3_LPD the PIPE_MISC YUV420 Enable (bit 27), already implies enabling
    full blend YUV420 mode and YUV420 Mode (bit 26) is removed.
    Therefore, avoid setting YUV420 Mode for Xe3_LPD+ while programming
    PIPE_MISC for YCbCr420 output format.
    
    Bspec: 69749
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch 169c7cd31a373ed31054abb423981856eb5fb119 drm-intel
87bc96a6fd63 drm/i915/display/xe3lpd: Avoid setting YUV420_MODE in PIPE_MISC