✓ CI.checkpatch: success for series starting with [1/2] drm/i915/watermark: Refactor dpkgc code

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/watermark: Refactor dpkgc code
URL   : https://patchwork.freedesktop.org/series/141334/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ef137b8cae2588b57e77b1dd2cfe8543b2cf5ce3
Author: Suraj Kandpal <suraj.kandpal at intel.com>
Date:   Thu Nov 14 10:00:41 2024 +0530

    drm/i915/watermark: Modify latency programmed into PKG_C_LATENCY
    
    Increase the latency programmed into PKG_C_LATENCY latency to be
    a multiple of line time which is written into WM_LINETIME.
    
    --v2
    -Fix commit subject line [Sai Teja]
    -Use individual DISPLAY_VER checks instead of range [Sai Teja]
    -Initialize max_linetime [Sai Teja]
    
    --v3
    -take into account the scenario when adjusted_latency is 0 [Vinod]
    
    --v4
    -rename adjusted_latency to latency [Mitul]
    -fix the condition in which dpkgc is disabled [Vinod]
    
    --v5
    -Add check to see if max_linetime is 0 [Vinod]
    
    WA: 22020299601
    Signed-off-by: Suraj Kandpal <suraj.kandpal at intel.com>
+ /mt/dim checkpatch 52166ab72753e6d0d496539d050a5f54d9f2278b drm-intel
4fec9eb3672e drm/i915/watermark: Refactor dpkgc code
ef137b8cae25 drm/i915/watermark: Modify latency programmed into PKG_C_LATENCY