[PATCH 1/4] drm/xe: Sort again info flags

[Rodrigo Vivi]

On Thu, Nov 14, 2024 at 07:21:45AM -0800, Lucas De Marchi wrote:
> Those flags are supposed to be kept sorted alphabetically. 

It is a good thing to keep a dream alive :)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> Unfortunately
> it's a constant battle as new flags are added to the end or at random
> places. Sort it again.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device_types.h | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index fffbb7d1c40b4..2c6a2040f0d82 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -300,10 +300,18 @@ struct xe_device {
>  		u8 is_dgfx:1;
>  		/** @info.has_asid: Has address space ID */
>  		u8 has_asid:1;
> +		/** @info.has_atomic_enable_pte_bit: Device has atomic enable PTE bit */
> +		u8 has_atomic_enable_pte_bit:1;
> +		/** @info.has_device_atomics_on_smem: Supports device atomics on SMEM */
> +		u8 has_device_atomics_on_smem:1;
>  		/** @info.force_execlist: Forced execlist submission */
>  		u8 force_execlist:1;
>  		/** @info.has_flat_ccs: Whether flat CCS metadata is used */
>  		u8 has_flat_ccs:1;
> +		/** @info.has_heci_cscfi: device has heci cscfi */
> +		u8 has_heci_cscfi:1;
> +		/** @info.has_heci_gscfi: device has heci gscfi */
> +		u8 has_heci_gscfi:1;
>  		/** @info.has_llc: Device has a shared CPU+GPU last level cache */
>  		u8 has_llc:1;
>  		/** @info.has_mmio_ext: Device has extra MMIO address range */
> @@ -323,20 +331,12 @@ struct xe_device {
>  		 * state the firmware or bootloader left it in.
>  		 */
>  		u8 probe_display:1;
> +		/** @info.skip_guc_pc: Skip GuC based PM feature init */
> +		u8 skip_guc_pc:1;
>  		/** @info.skip_mtcfg: skip Multi-Tile configuration from MTCFG register */
>  		u8 skip_mtcfg:1;
>  		/** @info.skip_pcode: skip access to PCODE uC */
>  		u8 skip_pcode:1;
> -		/** @info.has_heci_gscfi: device has heci gscfi */
> -		u8 has_heci_gscfi:1;
> -		/** @info.has_heci_cscfi: device has heci cscfi */
> -		u8 has_heci_cscfi:1;
> -		/** @info.skip_guc_pc: Skip GuC based PM feature init */
> -		u8 skip_guc_pc:1;
> -		/** @info.has_atomic_enable_pte_bit: Device has atomic enable PTE bit */
> -		u8 has_atomic_enable_pte_bit:1;
> -		/** @info.has_device_atomics_on_smem: Supports device atomics on SMEM */
> -		u8 has_device_atomics_on_smem:1;
>  	} info;
>  
>  	/** @irq: device interrupt state */
> -- 
> 2.47.0
>