[i-g-t 4/4] tests/xe/mmap: add tests for pci mem barrier
Matthew Auld
matthew.auld at intel.com
Fri Nov 15 10:50:29 UTC 2024
On 14/11/2024 05:01, Tejas Upadhyay wrote:
> We want to make sure that mmap do direct mapping of physical
> page at doorbell space and whole page is accessible in order
> to use pci memory barrier effect effectively.
>
> Following subtests are added,
> ./build/tests/xe_mmap --r pci-membarrier
> ./build/tests/xe_mmap --r pci-membarrier-bad-pagesize
> ./build/tests/xe_mmap --r pci-membarrier-bad-object
> > Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
> ---
> tests/intel/xe_mmap.c | 96 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 96 insertions(+)
>
> diff --git a/tests/intel/xe_mmap.c b/tests/intel/xe_mmap.c
> index fc5d73d59..ae0363a20 100644
> --- a/tests/intel/xe_mmap.c
> +++ b/tests/intel/xe_mmap.c
> @@ -64,6 +64,74 @@ test_mmap(int fd, uint32_t placement, uint32_t flags)
> gem_close(fd, bo);
> }
>
> +#define PAGE_SHIFT 12
Looks to be unused.
> +#define PAGE_SIZE 4096
> +
> +/**
> + * SUBTEST: pci-membarrier
> + * Description: create pci memory barrier with write on defined mmap offset.
> + * Test category: functionality test
> + *
> + */
> +static void test_pci_membarrier(int xe)
> +{
> + uint64_t flags = MAP_SHARED;
> + unsigned int prot = PROT_WRITE;
> + uint32_t *ptr;
> + uint64_t size = PAGE_SIZE;
> + struct timespec tv;
> + struct drm_xe_gem_mmap_offset mmo = {
> + .handle = 0,
> + .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
> + };
> +
> + igt_assert_eq(igt_ioctl(xe, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo), 0);
do_ioctl()
> + ptr = mmap(NULL, size, prot, flags, xe, mmo.offset);
> + igt_assert(ptr != MAP_FAILED);
> +
> + /* Check whole page for any errors, also check as
> + * we should not read written values back
> + */
> + for (int i = 0; i < size / sizeof(*ptr); i++) {
> + /* It is expected unconfigured doorbell space
> + * will return read value 0xdeadbeef
> + */
> + igt_assert_eq_u32(READ_ONCE(ptr[i]), 0xdeadbeef);
> +
> + igt_gettime(&tv);
> + ptr[i] = i;
> + if (READ_ONCE(ptr[i]) == i) {
> + while (READ_ONCE(ptr[i]) == i)
> + ;
> + igt_info("fd:%d value retained for %"PRId64"ns pos:%d\n",
> + xe, igt_nsec_elapsed(&tv), i);
> + }
> + igt_assert_neq(READ_ONCE(ptr[i]), i);
> + }
> +
> + munmap(ptr, size);
> +}
> +
> +/**
> + * SUBTEST: pci-membarrier-bad-pagesize
> + * Description: Test mmap offset with bad pagesize for pci membarrier.
> + * Test category: negative test
> + *
> + */
> +static void test_bad_pagesize_for_pcimem(int fd)
> +{
> + uint32_t *map;
> + uint64_t page_size = PAGE_SIZE * 2;
> + struct drm_xe_gem_mmap_offset mmo = {
> + .handle = 0,
> + .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
> + };
> +
> + igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo), 0);
do_ioctl()
> + map = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
> + igt_assert(map == MAP_FAILED);
> +}
> +
> /**
> * SUBTEST: bad-flags
> * Description: Test mmap offset with bad flags.
> @@ -126,6 +194,25 @@ static void test_bad_object(int fd)
> do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, ENOENT);
> }
>
> +/**
> + * SUBTEST: pci-membarrier-bad-object
> + * Description: Test mmap offset with bad object for pci mem barrier.
> + * Test category: negative test
> + *
> + */
> +static void test_bad_object_for_pcimem(int fd)
> +{
> + uint64_t size = xe_get_default_alignment(fd);
> + struct drm_xe_gem_mmap_offset mmo = {
> + .handle = xe_bo_create(fd, 0, size,
> + vram_if_possible(fd, 0),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM),
> + .flags = DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER,
> + };
> +
> + do_ioctl_err(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo, EINVAL);
> +}
> +
> static jmp_buf jmp;
>
> __noreturn static void sigtrap(int sig)
> @@ -273,6 +360,12 @@ igt_main
> test_mmap(fd, vram_memory(fd, 0) | system_memory(fd),
> DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
>
> + igt_subtest("pci-membarrier")
> + test_pci_membarrier(fd);
> +
> + igt_subtest_f("pci-membarrier-bad-pagesize")
igt_subtest()
Reviewed-by: Matthew Auld <matthew.auld at intel.com>
> + test_bad_pagesize_for_pcimem(fd);
> +
> igt_subtest("bad-flags")
> test_bad_flags(fd);
>
> @@ -282,6 +375,9 @@ igt_main
> igt_subtest("bad-object")
> test_bad_object(fd);
>
> + igt_subtest("pci-membarrier-bad-object")
> + test_bad_object_for_pcimem(fd);
> +
> igt_subtest("small-bar") {
> igt_require(xe_visible_vram_size(fd, 0));
> igt_require(xe_visible_vram_size(fd, 0) < xe_vram_size(fd, 0));
More information about the Intel-xe
mailing list