[PATCH 0/2] Fixes for MI_REPORT_PERF_COUNT

[Umesh Nerlige Ramappa]

OA programming sequence for query mode or MI_REPORT_PERF_COUNT requires
modifying some HW registers in the same hw context as the user exec
queue. User passes the exec_queue to the OA interface and OA
implementation submits an MI_LOAD_REGISTER_IMM to this queue to modify
the registers.

The OA implementation submits a batch mapped in GGTT to the user exec
queue and hence, some plumbing is added into relevant code to enable
that (as per suggestions from Matthew Brost).

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

Umesh Nerlige Ramappa (2):
  xe: Allow a GGTT mapped batch to be submitted to user exec queue
  xe/oa: Use MI_LOAD_REGISTER_IMMEDIATE to enable OAR/OAC

 drivers/gpu/drm/xe/xe_oa.c              | 68 ++++++++++++++++++-------
 drivers/gpu/drm/xe/xe_ring_ops.c        |  5 +-
 drivers/gpu/drm/xe/xe_sched_job.c       |  1 +
 drivers/gpu/drm/xe/xe_sched_job_types.h |  2 +
 4 files changed, 57 insertions(+), 19 deletions(-)

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2.34.1