✗ CI.checkpatch: warning for Fixes for MI_REPORT_PERF_COUNT

[Patchwork]

== Series Details ==

Series: Fixes for MI_REPORT_PERF_COUNT
URL   : https://patchwork.freedesktop.org/series/141811/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1a6a4b00a751e0371ed02cfa9aa50a13ec4cb19e
Author: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
Date:   Tue Nov 26 16:31:27 2024 -0800

    xe/oa: Use MI_LOAD_REGISTER_IMMEDIATE to enable OAR/OAC
    
    To enable OAR/OAC, a bit in RING_CONTEXT_CONTROL needs to be set.
    Setting this bit cause the context image size to change and if not done
    correct, can cause undesired hangs.
    
    Current code uses a separate exec_queue to modify this bit and is
    error-prone. As per HW recommendation, submit MI_LOAD_REGISTER_IMM to
    the target hardware context to modify the relevant bit.
    
    Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
+ /mt/dim checkpatch 739a2506c44a0be22cc842d2c625a05ed21c1198 drm-intel
088c6981f81e xe: Allow a GGTT mapped batch to be submitted to user exec queue
1a6a4b00a751 xe/oa: Use MI_LOAD_REGISTER_IMMEDIATE to enable OAR/OAC
-:146: ERROR:CODE_INDENT: code indent should use tabs where possible
#146: FILE: drivers/gpu/drm/xe/xe_oa.c:836:
+       ^I};$

-:146: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#146: FILE: drivers/gpu/drm/xe/xe_oa.c:836:
+       ^I};$

-:146: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#146: FILE: drivers/gpu/drm/xe/xe_oa.c:836:
+       ^I};$

total: 1 errors, 2 warnings, 0 checks, 133 lines checked