✗ CI.checkpatch: warning for drm/i915/dp: Guarantee a minimum HBlank time (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Guarantee a minimum HBlank time (rev2)
URL   : https://patchwork.freedesktop.org/series/139268/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d7b9f7fa2f2d2fe83c465946a383b4271b16dfe7
Author: Arun R Murthy <arun.r.murthy at intel.com>
Date:   Tue Oct 1 13:13:48 2024 +0530

    drm/i915/dp: Guarantee a minimum HBlank time
    
    Mandate a minimum Hblank symbol cycle count between BS and BE in 8b/10b
    MST and 12b/132b mode.
    Spec: DP2.1a
    
    v2: Affine calculation/updation of min HBlank to dp_mst (Jani)
    
    Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
+ /mt/dim checkpatch 126b085652ff525948f88b62128ec9d95e00e281 drm-intel
d7b9f7fa2f2d drm/i915/dp: Guarantee a minimum HBlank time
-:52: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#52: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:176:
+	hblank = DIV_ROUND_UP((DIV_ROUND_UP(adjusted_mode->htotal - adjusted_mode->hdisplay, 4) * bpp_x16), symbol_size);

-:92: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#92: FILE: drivers/gpu/drm/i915/i915_reg.h:1143:
+#define DP_MIN_HBLANK_CTL(dev_priv, trans)	_MMIO_TRANS2(dev_priv, (trans), _DP_MIN_HBLANK_CTL_A)

total: 0 errors, 2 warnings, 0 checks, 66 lines checked