[PATCH 1/3] drm/xe/pmu: Enable PMU interface

Belgaumkar, Vinay vinay.belgaumkar at intel.com
Tue Oct 1 22:08:03 UTC 2024


On 10/1/2024 2:32 PM, Lucas De Marchi wrote:
> On Thu, Sep 26, 2024 at 05:23:42PM GMT, Vinay Belgaumkar wrote:
>> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
>> index b6fbe4988f2e..2c5f258eee3a 100644
>> --- a/include/uapi/drm/xe_drm.h
>> +++ b/include/uapi/drm/xe_drm.h
>> @@ -1389,6 +1389,14 @@ struct drm_xe_wait_user_fence {
>>     __u64 reserved[2];
>> };
>>
>> +/*
>> + * Top bits of every counter are GT id.
>> + */
>> +#define __XE_PMU_GT_SHIFT (56)
>> +
>> +#define ___XE_PMU_OTHER(gt, x) \
>> +    (((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
>> +
>
> why are you touching this?
>
> I thought we agreed it's not needed at all on previous version of this
> patch: 
> https://lore.kernel.org/intel-xe/602bffcd-d66f-4b49-b3b4-abb934b00f3a@intel.com/
>
> what changed?

IGT tests like perf_pmu use this interface to open specific PMU files, 
for example-

                 fd[pmus] = perf_i915_open_group(gem_fd,
__I915_PMU_RC6_RESIDENCY(gt_),
                                                 fd[0]);
If we define these inside non-header files, these kinds of tests and any 
other user programs that may be doing this, will need to look at kernel 
code to determine the PMU config? I assumed we needed these bare minimum 
header definitions.

Thanks,

Vinay.

>
>
> Lucas De Marchi


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