✗ CI.checkpatch: warning for series starting with [CI,1/3] drm/i915/irq: add struct i915_irq_regs triplet
Patchwork
patchwork at emeril.freedesktop.org
Wed Oct 2 10:35:12 UTC 2024
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/irq: add struct i915_irq_regs triplet
URL : https://patchwork.freedesktop.org/series/139413/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit c17f78592e8a125208775d958ce5136847b5b26b
Author: Jani Nikula <jani.nikula at intel.com>
Date: Wed Oct 2 13:26:45 2024 +0300
drm/i915/irq: remove GEN8_IRQ_RESET_NDX() and GEN8_IRQ_INIT_NDX() macros
Define register offset triplets for all registers used with
GEN8_IRQ_RESET_NDX() and GEN8_IRQ_INIT_NDX() macros, and call the
underlying gen3_irq_reset() and gen3_irq_init() functions
directly. Remove the macros, along with the macro name concatenation
hackery.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+ /mt/dim checkpatch ccd6d671492e28746e9ed8e88bd6d25b6f3295dd drm-intel
d7162b51206f drm/i915/irq: add struct i915_irq_regs triplet
fc2c5ea66807 drm/i915/irq: remove GEN3_IRQ_RESET() and GEN3_IRQ_INIT() macros
c17f78592e8a drm/i915/irq: remove GEN8_IRQ_RESET_NDX() and GEN8_IRQ_INIT_NDX() macros
-:145: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'which' - possible side-effects?
#145: FILE: drivers/gpu/drm/i915/i915_reg.h:2494:
+#define GEN8_GT_IRQ_REGS(which) I915_IRQ_REGS(GEN8_GT_IMR(which), \
+ GEN8_GT_IER(which), \
+ GEN8_GT_IIR(which))
-:156: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#156: FILE: drivers/gpu/drm/i915/i915_reg.h:2549:
+#define GEN8_DE_PIPE_IRQ_REGS(pipe) I915_IRQ_REGS(GEN8_DE_PIPE_IMR(pipe), \
+ GEN8_DE_PIPE_IER(pipe), \
+ GEN8_DE_PIPE_IIR(pipe))
total: 0 errors, 0 warnings, 2 checks, 121 lines checked
More information about the Intel-xe
mailing list