[PATCH] drm/xe: Mark dpt requiring 8K alignment

[Ville Syrjälä]

On Wed, Oct 02, 2024 at 02:47:55PM +0300, Juha-Pekka Heikkila wrote:
> Due to hw requirements relating to long strides let's align display
> page table to 8k.

This stuff belongs in plane->min_alignment(), and then the xe
ggtt/dpt code needs to be fixed to do what its told.

> 
> BSpec: 50417
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> ---
>  drivers/gpu/drm/xe/display/xe_fb_pin.c | 9 ++++++---
>  drivers/gpu/drm/xe/xe_bo.h             | 1 +
>  drivers/gpu/drm/xe/xe_ggtt.c           | 2 ++
>  3 files changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 79dbbbe03c7f..976f4d1a03cd 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -103,19 +103,22 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
>  					   ttm_bo_type_kernel,
>  					   XE_BO_FLAG_VRAM0 |
>  					   XE_BO_FLAG_GGTT |
> -					   XE_BO_FLAG_PAGETABLE);
> +					   XE_BO_FLAG_PAGETABLE |
> +					   XE_BO_FLAG_NEED_8K_ALIGN);
>  	else
>  		dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
>  					   ttm_bo_type_kernel,
>  					   XE_BO_FLAG_STOLEN |
>  					   XE_BO_FLAG_GGTT |
> -					   XE_BO_FLAG_PAGETABLE);
> +					   XE_BO_FLAG_PAGETABLE |
> +					   XE_BO_FLAG_NEED_8K_ALIGN);
>  	if (IS_ERR(dpt))
>  		dpt = xe_bo_create_pin_map(xe, tile0, NULL, dpt_size,
>  					   ttm_bo_type_kernel,
>  					   XE_BO_FLAG_SYSTEM |
>  					   XE_BO_FLAG_GGTT |
> -					   XE_BO_FLAG_PAGETABLE);
> +					   XE_BO_FLAG_PAGETABLE |
> +					   XE_BO_FLAG_NEED_8K_ALIGN);
>  	if (IS_ERR(dpt))
>  		return PTR_ERR(dpt);
>  
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index 31f4ba3bd8c1..154d6fe4c823 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -39,6 +39,7 @@
>  #define XE_BO_FLAG_NEEDS_64K		BIT(15)
>  #define XE_BO_FLAG_NEEDS_2M		BIT(16)
>  #define XE_BO_FLAG_GGTT_INVALIDATE	BIT(17)
> +#define XE_BO_FLAG_NEED_8K_ALIGN	BIT(18)
>  /* this one is trigger internally only */
>  #define XE_BO_FLAG_INTERNAL_TEST	BIT(30)
>  #define XE_BO_FLAG_INTERNAL_64K		BIT(31)
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index f68af56c3f86..0b17c0afcd95 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -605,6 +605,8 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
>  
>  	if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K)
>  		alignment = SZ_64K;
> +	else if (bo->flags & XE_BO_FLAG_NEED_8K_ALIGN)
> +		alignment = SZ_8K;
>  
>  	if (XE_WARN_ON(bo->ggtt_node)) {
>  		/* Someone's already inserted this BO in the GGTT */
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel