[PATCH 4/6] drm/xe/ptl: PTL re-uses Xe2 MOCS table

[Chauhan, Shekhar]

On 10/8/2024 7:05, Matt Atwood wrote:
> From: Haridhar Kalvala <haridhar.kalvala at intel.com>
>
> PTL is Xe3 architecture but there is no difference between LNL and PTL
> in MOCS table.  So, PTL uses the same MOCS table as LNL.
>
> Bpsec: 71582

Also, similar to another review by Matt Roper on Patch 5/6, we can 
remove the empty line here below the BSpec. There appears to be a typo 
as well. But yes, patch itself LGTM. The RB is already present below, 
adding it again

Reviewed-by: Shekhar Chauhan <shekhar.chauhan at intel.com>

>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Shekhar Chauhan <shekhar.chauhan at intel.com>
> Signed-off-by: Haridhar Kalvala <haridhar.kalvala at intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> Reviewed-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_mocs.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
> index 8df41cd12d51..231d0e86ed83 100644
> --- a/drivers/gpu/drm/xe/xe_mocs.c
> +++ b/drivers/gpu/drm/xe/xe_mocs.c
> @@ -576,6 +576,7 @@ static unsigned int get_mocs_settings(struct xe_device *xe,
>   	memset(info, 0, sizeof(struct xe_mocs_info));
>   
>   	switch (xe->info.platform) {
> +	case XE_PANTHERLAKE:
>   	case XE_LUNARLAKE:
>   	case XE_BATTLEMAGE:
>   		info->ops = &xe2_mocs_ops;

-- 
-shekhar