[PATCH 4/5] drm/xe/pf: Prepare GuC Buffer Cache for PF-only actions

[Michal Wajdeczko]

Some of the VF's management actions requires use of GuC indirect
data. Initialize PF-only instance of the GuC Buffer Cache that
could be used for that purposes.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
---
 drivers/gpu/drm/xe/xe_gt.c                |  6 +++++
 drivers/gpu/drm/xe/xe_gt_sriov_pf.c       | 32 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_gt_sriov_pf.h       |  6 +++++
 drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h |  4 +++
 4 files changed, 48 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 1c79660fb086..540451c3e972 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -435,6 +435,12 @@ static int gt_fw_domain_init(struct xe_gt *gt)
 	if (err)
 		goto err_force_wake;
 
+	if (IS_SRIOV_PF(gt_to_xe(gt))) {
+		err = xe_gt_sriov_pf_init(gt);
+		if (err)
+			goto err_force_wake;
+	}
+
 	/*
 	 * Stash hardware-reported version.  Since this register does not exist
 	 * on pre-MTL platforms, reading it there will (correctly) return 0.
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf.c
index e71fc3d2bda2..d96742e1e886 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf.c
@@ -15,6 +15,7 @@
 #include "xe_gt_sriov_pf_helpers.h"
 #include "xe_gt_sriov_pf_migration.h"
 #include "xe_gt_sriov_pf_service.h"
+#include "xe_guc_buf.h"
 #include "xe_mmio.h"
 
 /*
@@ -68,6 +69,37 @@ int xe_gt_sriov_pf_init_early(struct xe_gt *gt)
 	return 0;
 }
 
+static int pf_init_guc_buf_cache(struct xe_gt *gt)
+{
+	struct xe_guc_buf_cache *cache;
+
+	cache = xe_guc_buf_cache_init(&gt->uc.guc, SZ_8K);
+	if (IS_ERR(cache))
+		return PTR_ERR(cache);
+
+	gt->sriov.pf.buf_cache = cache;
+	return 0;
+}
+
+/**
+ * xe_gt_sriov_pf_init - Prepare SR-IOV PF data structures on PF.
+ * @gt: the &xe_gt to initialize
+ *
+ * Late initialization of the PF data.
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int xe_gt_sriov_pf_init(struct xe_gt *gt)
+{
+	int err;
+
+	err = pf_init_guc_buf_cache(gt);
+	if (err)
+		return err;
+
+	return 0;
+}
+
 static bool pf_needs_enable_ggtt_guest_update(struct xe_device *xe)
 {
 	return GRAPHICS_VERx100(xe) == 1200;
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf.h
index 96fab779a906..f474509411c0 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf.h
@@ -10,6 +10,7 @@ struct xe_gt;
 
 #ifdef CONFIG_PCI_IOV
 int xe_gt_sriov_pf_init_early(struct xe_gt *gt);
+int xe_gt_sriov_pf_init(struct xe_gt *gt);
 void xe_gt_sriov_pf_init_hw(struct xe_gt *gt);
 void xe_gt_sriov_pf_sanitize_hw(struct xe_gt *gt, unsigned int vfid);
 void xe_gt_sriov_pf_restart(struct xe_gt *gt);
@@ -19,6 +20,11 @@ static inline int xe_gt_sriov_pf_init_early(struct xe_gt *gt)
 	return 0;
 }
 
+static inline int xe_gt_sriov_pf_init(struct xe_gt *gt)
+{
+	return 0;
+}
+
 static inline void xe_gt_sriov_pf_init_hw(struct xe_gt *gt)
 {
 }
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h
index 0426b1a77069..d76cfa16c422 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h
@@ -15,6 +15,8 @@
 #include "xe_gt_sriov_pf_policy_types.h"
 #include "xe_gt_sriov_pf_service_types.h"
 
+struct xe_guc_buf_cache;
+
 /**
  * struct xe_gt_sriov_metadata - GT level per-VF metadata.
  */
@@ -43,6 +45,7 @@ struct xe_gt_sriov_metadata {
  * @migration: migration data.
  * @spare: PF-only provisioning configuration.
  * @vfs: metadata for all VFs.
+ * @buf_cache: PF-only GuC buffer cache for indirect data
  */
 struct xe_gt_sriov_pf {
 	struct xe_gt_sriov_pf_service service;
@@ -51,6 +54,7 @@ struct xe_gt_sriov_pf {
 	struct xe_gt_sriov_pf_migration migration;
 	struct xe_gt_sriov_spare_config spare;
 	struct xe_gt_sriov_metadata *vfs;
+	struct xe_guc_buf_cache *buf_cache;
 };
 
 #endif
-- 
2.43.0