✗ CI.checkpatch: warning for drm/xe: Enlarge the invalidation timeout from 150 to 500 (rev3)

[Patchwork]

== Series Details ==

Series: drm/xe: Enlarge the invalidation timeout from 150 to 500 (rev3)
URL   : https://patchwork.freedesktop.org/series/139805/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9e3629517b0816edb7138c019aee7fda1ecd21b5
Author: Shuicheng Lin <shuicheng.lin at intel.com>
Date:   Thu Oct 10 21:53:46 2024 +0000

    drm/xe: Enlarge the invalidation timeout from 150 to 500
    
    There are error messages like below that are occurring during stress testing:
    "[   31.004009] xe 0000:03:00.0: [drm] ERROR GT0: Global invalidation timeout"
    Previously it was hitting this 3 with 1000 executions of warm reboot.
    After raising it to 500, 1000 warm reboot executions passed and it didn't
    fail.
    
    Due to the way xe_mmio_wait32() is implemented, the timeout is able to expire
    early when the register matches the expected value due to the wait increments
    starting small. So, the larger timeout value should have no effect during
    normal use cases.
    
    Signed-off-by: Shuicheng Lin <shuicheng.lin at intel.com>
    Cc: Lucas De Marchi <lucas.demarchi at intel.com>
    Cc: Matthew Auld <matthew.auld at intel.com>
    Cc: Nirmoy Das <nirmoy.das at intel.com>
    Reviewed-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
    Tested-by: Zongyao Bai <zongyao.bai at intel.com>
+ /mt/dim checkpatch 10f232fcfa47dc35d2403148616ad71ccde7d0f3 drm-intel
9e3629517b08 drm/xe: Enlarge the invalidation timeout from 150 to 500
-:6: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#6: 
There are error messages like below that are occurring during stress testing:

total: 0 errors, 1 warnings, 0 checks, 8 lines checked