[PATCH v9 20/26] drm/xe/gt_tlb_invalidation_ggtt: Update handling of xe_force_wake_get return
Nirmoy Das
nirmoy.das at linux.intel.com
Tue Oct 15 15:29:40 UTC 2024
On 10/14/2024 9:55 AM, Himal Prasad Ghimiray wrote:
> xe_force_wake_get() now returns the reference count-incremented domain
> mask. If it fails for individual domains, the return value will always
> be 0. However, for XE_FORCEWAKE_ALL, it may return a non-zero value even
> in the event of failure. Update the return handling of xe_force_wake_get()
> to reflect this behavior, and ensure that the return value is passed as
> input to xe_force_wake_put().
>
> v3
> - return xe_wakeref_t instead of int in xe_force_wake_get()
>
> v5
> - return unsigned int from xe_force_wake_get()
> - remove redundant warns
>
> v7
> - Fix commit message
>
> Cc: Matthew Brost <matthew.brost at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> index a530a933eedc..773de1f08db9 100644
> --- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> +++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> @@ -268,6 +268,7 @@ static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
> int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
> {
> struct xe_device *xe = gt_to_xe(gt);
> + unsigned int fw_ref;
>
> if (xe_guc_ct_enabled(>->uc.guc.ct) &&
> gt->uc.guc.submission_state.enabled) {
> @@ -286,7 +287,7 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
> if (IS_SRIOV_VF(xe))
> return 0;
>
> - xe_gt_WARN_ON(gt, xe_force_wake_get(gt_to_fw(gt), XE_FW_GT));
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
> xe_mmio_write32(mmio, PVC_GUC_TLB_INV_DESC1,
> PVC_GUC_TLB_INV_DESC1_INVALIDATE);
> @@ -296,7 +297,7 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
> xe_mmio_write32(mmio, GUC_TLB_INV_CR,
> GUC_TLB_INV_CR_INVALIDATE);
> }
> - xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
> }
>
> return 0;
More information about the Intel-xe
mailing list