[PATCH v9 12/26] drm/xe/tests/mocs: Update xe_force_wake_get() return handling

Nilawar, Badal badal.nilawar at intel.com
Tue Oct 15 16:08:01 UTC 2024



On 14-10-2024 13:25, Himal Prasad Ghimiray wrote:
> With xe_force_wake_get() now returning the refcount-incremented domain
> mask, a return value of 0 indicates failure for single domains.
> Change assert condition to incorporate this change in return and
> pass the return value to xe_force_wake_put()
> 
> v3
> - return xe_wakeref_t instead of int in xe_force_wake_get()
> 
> v5
> - return unsigned int for xe_force_wake_get()
> 
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
> ---
>   drivers/gpu/drm/xe/tests/xe_mocs.c | 18 ++++++++----------
>   1 file changed, 8 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_mocs.c b/drivers/gpu/drm/xe/tests/xe_mocs.c
> index ea932c051cc7..6f9b7a266b41 100644
> --- a/drivers/gpu/drm/xe/tests/xe_mocs.c
> +++ b/drivers/gpu/drm/xe/tests/xe_mocs.c
> @@ -43,12 +43,11 @@ static void read_l3cc_table(struct xe_gt *gt,
>   {
>   	struct kunit *test = kunit_get_current_test();
>   	u32 l3cc, l3cc_expected;
> -	unsigned int i;
> +	unsigned int fw_ref, i;
>   	u32 reg_val;
> -	u32 ret;
>   
> -	ret = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> -	KUNIT_ASSERT_EQ_MSG(test, ret, 0, "Forcewake Failed.\n");
> +	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> +	KUNIT_ASSERT_NE_MSG(test, fw_ref, 0, "Forcewake Failed.\n");
>   
>   	for (i = 0; i < info->num_mocs_regs; i++) {
>   		if (!(i & 1)) {
> @@ -72,7 +71,7 @@ static void read_l3cc_table(struct xe_gt *gt,
>   		KUNIT_EXPECT_EQ_MSG(test, l3cc_expected, l3cc,
>   				    "l3cc idx=%u has incorrect val.\n", i);
>   	}
> -	xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
> +	xe_force_wake_put(gt_to_fw(gt), fw_ref);
>   }
>   
>   static void read_mocs_table(struct xe_gt *gt,
> @@ -80,15 +79,14 @@ static void read_mocs_table(struct xe_gt *gt,
>   {
>   	struct kunit *test = kunit_get_current_test();
>   	u32 mocs, mocs_expected;
> -	unsigned int i;
> +	unsigned int fw_ref, i;
>   	u32 reg_val;
> -	u32 ret;
>   
>   	KUNIT_EXPECT_TRUE_MSG(test, info->unused_entries_index,
>   			      "Unused entries index should have been defined\n");
>   
> -	ret = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> -	KUNIT_ASSERT_EQ_MSG(test, ret, 0, "Forcewake Failed.\n");
> +	fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> +	KUNIT_ASSERT_NE_MSG(test, fw_ref, 0, "Forcewake Failed.\n");
>   
>   	for (i = 0; i < info->num_mocs_regs; i++) {
>   		if (regs_are_mcr(gt))
> @@ -106,7 +104,7 @@ static void read_mocs_table(struct xe_gt *gt,
>   				    "mocs reg 0x%x has incorrect val.\n", i);
>   	}
>   
> -	xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
> +	xe_force_wake_put(gt_to_fw(gt), fw_ref);

LGTM.
Reviewed-by: Badal Nilawar <badal.nilawar at intel.com>

Regards,
Badal

>   }
>   
>   static int mocs_kernel_test_run_device(struct xe_device *xe)



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