[PATCH 02/10] drm/i915/vdsc: Use VDSC0/VDSC1 for LEFT/RIGHT VDSC engine

[Kandpal, Suraj]

> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal at intel.com>
> Sent: Thursday, October 17, 2024 1:54 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: intel-xe at lists.freedesktop.org; Kandpal, Suraj
> <suraj.kandpal at intel.com>
> Subject: [PATCH 02/10] drm/i915/vdsc: Use VDSC0/VDSC1 for LEFT/RIGHT
> VDSC engine
> 
> Drop use of LEFT/RIGHT VDSC engine and use VDSC0/VDSC1 instead.

You are introducing the use of REG_BIT macro here so add that in the commit message too.
The rest LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal at intel.com>

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c      | 8 ++++----
>  drivers/gpu/drm/i915/display/intel_vdsc_regs.h | 4 ++--
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 65c884b4f064..bc5f8c5cb1d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -777,9 +777,9 @@ void intel_dsc_enable(const struct intel_crtc_state
> *crtc_state)
> 
>  	intel_dsc_pps_configure(crtc_state);
> 
> -	dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;
> +	dss_ctl2_val |= VDSC0_ENABLE;
>  	if (vdsc_instances_per_pipe > 1) {
> -		dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;
> +		dss_ctl2_val |= VDSC1_ENABLE;
>  		dss_ctl1_val |= JOINER_ENABLE;
>  	}
>  	if (crtc_state->joiner_pipes) {
> @@ -979,12 +979,12 @@ void intel_dsc_get_config(struct intel_crtc_state
> *crtc_state)
>  	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc,
> cpu_transcoder));
>  	dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc,
> cpu_transcoder));
> 
> -	crtc_state->dsc.compression_enable = dss_ctl2 &
> LEFT_BRANCH_VDSC_ENABLE;
> +	crtc_state->dsc.compression_enable = dss_ctl2 & VDSC0_ENABLE;
>  	if (!crtc_state->dsc.compression_enable)
>  		goto out;
> 
>  	if ((dss_ctl1 & JOINER_ENABLE) &&
> -	    (dss_ctl2 & RIGHT_BRANCH_VDSC_ENABLE))
> +	    (dss_ctl2 & VDSC1_ENABLE))
>  		crtc_state->dsc.dsc_split = INTEL_DSC_SPLIT_2_STREAMS;
>  	else
>  		crtc_state->dsc.dsc_split = INTEL_DSC_SPLIT_DISABLED; diff --
> git a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> index bf32a3b46fb1..d7a72b95ee7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
> @@ -21,8 +21,8 @@
>  #define  MAX_DL_BUFFER_TARGET_DEPTH		0x5a0
> 
>  #define DSS_CTL2				_MMIO(0x67404)
> -#define  LEFT_BRANCH_VDSC_ENABLE		(1 << 31)
> -#define  RIGHT_BRANCH_VDSC_ENABLE		(1 << 15)
> +#define  VDSC0_ENABLE				REG_BIT(31)
> +#define  VDSC1_ENABLE				REG_BIT(15)
>  #define  RIGHT_DL_BUF_TARGET_DEPTH_MASK		(0xfff << 0)
>  #define  RIGHT_DL_BUF_TARGET_DEPTH(pixels)	((pixels) << 0)
> 
> --
> 2.45.2