[PATCH] drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout
Jani Nikula
jani.nikula at linux.intel.com
Thu Oct 24 09:42:41 UTC 2024
On Wed, 23 Oct 2024, Nirmoy Das <nirmoy.das at intel.com> wrote:
> Flush xe ordered_wq in case of ufence timeout which is observed
> on LNL and that points recent scheduling issue with E-cores.
>
> This is similar to the recent fix:
> commit e51527233804 ("drm/xe/guc/ct: Flush g2h worker in case of g2h
> response timeout") and should be removed once there is E core
> scheduling fix.
>
> Cc: Badal Nilawar <badal.nilawar at intel.com>
> Cc: Matthew Auld <matthew.auld at intel.com>
> Cc: John Harrison <John.C.Harrison at Intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2754
> Suggested-by: Matthew Brost <matthew.brost at intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
> ---
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> index f5deb81eba01..7f034871345b 100644
> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> @@ -155,6 +155,17 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> }
>
> if (!timeout) {
> + /*
> + * This is analogous to e51527233804 ("drm/xe/guc/ct: Flush g2h worker
> + * in case of g2h response timeout")
> + *
> + * TODO: Drop this change once workqueue scheduling delay issue is
> + * fixed on LNL Hybrid CPU.
> + */
> + __flush_workqueue(xe->ordered_wq);
Just flush_workqueue() please, not the double underscored version. The
double underscores are there to tell you not to use it...
BR,
Jani.
> + err = do_compare(addr, args->value, args->mask, args->op);
> + if (err <= 0)
> + break;
> err = -ETIME;
> break;
> }
--
Jani Nikula, Intel
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