✓ CI.FULL: success for drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout

[Patchwork]

== Series Details ==

Series: drm/xe/ufence: Flush xe ordered_wq in case of ufence timeout
URL   : https://patchwork.freedesktop.org/series/140386/
State : success

== Summary ==

CI Bug Log - changes from xe-2109-cef44d6820e61ebf180bd771e78f162b4bae4a6f_full -> xe-pw-140386v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-2109-cef44d6820e61ebf180bd771e78f162b4bae4a6f -> xe-pw-140386v1

  IGT_8082: c8379ec8b26f3c21bae5473706b23da78bd26ffa @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-2109-cef44d6820e61ebf180bd771e78f162b4bae4a6f: cef44d6820e61ebf180bd771e78f162b4bae4a6f
  xe-pw-140386v1: 140386v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-140386v1/index.html
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