✓ CI.checkpatch: success for series starting with [v1,1/1] drm/xe/guc: Fix missing init value and add register order check (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v1,1/1] drm/xe/guc: Fix missing init value and add register order check (rev2)
URL   : https://patchwork.freedesktop.org/series/140392/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0f4cb7bc510187494a74a66e1a46fed540da7607
Author: Zhanjun Dong <zhanjun.dong at intel.com>
Date:   Wed Oct 23 12:23:07 2024 -0700

    drm/xe/guc: Fix missing init value and add register order check
    
    Fix missing initial value for last_value.
    For GuC capture register definition, it is required to define 64bit
    register in a pair of 2 consecutive 32bit register entries, low first,
    then hi. Add code to check this order.
    
    Fixes: 0f1fdf559225 ("drm/xe/guc: Save manual engine capture into capture list")
    Signed-off-by: Zhanjun Dong <zhanjun.dong at intel.com>
+ /mt/dim checkpatch 405e02c22d91503cc6c3d54f675ae25df62db9df drm-intel
0f4cb7bc5101 drm/xe/guc: Fix missing init value and add register order check