[PATCH 02/43] drm/xe: Create dedicated xe_mmio structure

[Lucas De Marchi]

On Tue, Sep 03, 2024 at 05:21:03PM GMT, Matt Roper wrote:
>Pull the 'mmio' substructure from xe_device out into a dedicated type.
>Future patches will expand this structure and then eventually move MMIO
>read/write operations over to using this type.
>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>---
> drivers/gpu/drm/xe/xe_device_types.h | 24 +++++++++++++++++-------
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index ec7eb7811126..a02e5dfcc6a7 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -107,6 +107,22 @@ struct xe_mem_region {
> 	void __iomem *mapping;
> };
>
>+/**
>+ * struct xe_mmio - register mmio structure
>+ *
>+ * Represents an MMIO region that the CPU may use to access registers.  A
>+ * region may share its IO map with other regions (e.g., all GTs within a
>+ * tile share the same map with their parent tile, but represent different
>+ * subregions of the overall IO space).
>+ */
>+struct xe_mmio {
>+	/** @regs: Map used to access registers. */
>+	void __iomem *regs;
>+
>+	/** @map_size: Size of the map. */

did you mean to rename and then gave up?

>+	size_t size;

 From a quick grep it seems we were not relying on the order of the mmio
members, so this looks ok.

With the fix above,

	Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>+};
>+
> /**
>  * struct xe_tile - hardware tile structure
>  *
>@@ -148,13 +164,7 @@ struct xe_tile {
> 	 * * 4MB-8MB: reserved
> 	 * * 8MB-16MB: global GTT
> 	 */
>-	struct {
>-		/** @mmio.size: size of tile's MMIO space */
>-		size_t size;
>-
>-		/** @mmio.regs: pointer to tile's MMIO space (starting with registers) */
>-		void __iomem *regs;
>-	} mmio;
>+	struct xe_mmio mmio;
>
> 	/**
> 	 * @mmio_ext: MMIO-extension info for a tile.
>-- 
>2.45.2
>