[PATCH 04/43] drm/xe: Move GSI offset adjustment fields into 'struct xe_mmio'

Lucas De Marchi lucas.demarchi at intel.com
Thu Sep 5 21:53:15 UTC 2024


On Tue, Sep 03, 2024 at 05:21:05PM GMT, Matt Roper wrote:
>By moving the GSI adjustment fields into 'struct xe_mmio' we can replace
>the GT's MMIO substructure with another instance of xe_mmio.  At the
>moment this means MMIO operations wind up pulling information from two
>different places (the tile's xe_mmio for the iomap and the GT's xe_mmio
>for the adjustment), but we'll address that in future patches.
>
>The type headers change a bit with this change, meaning that various
>files should be including xe_device_types.h instead of (or in addition
>to) xe_gt_types.h.
>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>---
> drivers/gpu/drm/xe/xe_assert.h       |  2 +-
> drivers/gpu/drm/xe/xe_device.h       |  1 +
> drivers/gpu/drm/xe/xe_device_types.h |  7 ++++++-
> drivers/gpu/drm/xe/xe_gt_freq.c      |  2 +-
> drivers/gpu/drm/xe/xe_gt_printk.h    |  2 +-
> drivers/gpu/drm/xe/xe_gt_types.h     | 11 ++---------
> 6 files changed, 12 insertions(+), 13 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_assert.h b/drivers/gpu/drm/xe/xe_assert.h
>index e22bbf57fca7..04d6b95c6d87 100644
>--- a/drivers/gpu/drm/xe/xe_assert.h
>+++ b/drivers/gpu/drm/xe/xe_assert.h
>@@ -10,7 +10,7 @@
>
> #include <drm/drm_print.h>
>
>-#include "xe_device_types.h"
>+#include "xe_gt_types.h"
> #include "xe_step.h"
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
>index ec726dcd5f99..ca8d8ef6342b 100644
>--- a/drivers/gpu/drm/xe/xe_device.h
>+++ b/drivers/gpu/drm/xe/xe_device.h
>@@ -9,6 +9,7 @@
> #include <drm/drm_util.h>
>
> #include "xe_device_types.h"
>+#include "xe_gt_types.h"
>
> static inline struct xe_device *to_xe_device(const struct drm_device *dev)
> {
>diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>index 7427f40086e8..e080be9bba52 100644
>--- a/drivers/gpu/drm/xe/xe_device_types.h
>+++ b/drivers/gpu/drm/xe/xe_device_types.h
>@@ -14,7 +14,6 @@
>
> #include "xe_devcoredump_types.h"
> #include "xe_heci_gsc.h"
>-#include "xe_gt_types.h"
> #include "xe_lmtt_types.h"
> #include "xe_memirq_types.h"
> #include "xe_oa.h"
>@@ -127,6 +126,12 @@ struct xe_mmio {
> 	 * non-register regions such as the GGTT PTEs.
> 	 */
> 	size_t regs_length;
>+
>+	/** adj_limit: adjust MMIO address if address is below this value */
>+	u32 adj_limit;
>+
>+	/** @adj_offset: offect to add to MMIO address when adjusting */

			 ^

while at it, may be worth to fix the typo that was already there.


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>+	u32 adj_offset;
> };
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_gt_freq.c b/drivers/gpu/drm/xe/xe_gt_freq.c
>index 68a5778b4319..552435951f11 100644
>--- a/drivers/gpu/drm/xe/xe_gt_freq.c
>+++ b/drivers/gpu/drm/xe/xe_gt_freq.c
>@@ -11,9 +11,9 @@
> #include <drm/drm_managed.h>
> #include <drm/drm_print.h>
>
>-#include "xe_device_types.h"
> #include "xe_gt_sysfs.h"
> #include "xe_gt_throttle.h"
>+#include "xe_gt_types.h"
> #include "xe_guc_pc.h"
> #include "xe_pm.h"
>
>diff --git a/drivers/gpu/drm/xe/xe_gt_printk.h b/drivers/gpu/drm/xe/xe_gt_printk.h
>index d6228baaff1e..5dc71394372d 100644
>--- a/drivers/gpu/drm/xe/xe_gt_printk.h
>+++ b/drivers/gpu/drm/xe/xe_gt_printk.h
>@@ -8,7 +8,7 @@
>
> #include <drm/drm_print.h>
>
>-#include "xe_device_types.h"
>+#include "xe_gt_types.h"
>
> #define xe_gt_printk(_gt, _level, _fmt, ...) \
> 	drm_##_level(&gt_to_xe(_gt)->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
>diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
>index e9026023e240..593bc5aa9a4a 100644
>--- a/drivers/gpu/drm/xe/xe_gt_types.h
>+++ b/drivers/gpu/drm/xe/xe_gt_types.h
>@@ -6,6 +6,7 @@
> #ifndef _XE_GT_TYPES_H_
> #define _XE_GT_TYPES_H_
>
>+#include "xe_device_types.h"
> #include "xe_force_wake_types.h"
> #include "xe_gt_idle_types.h"
> #include "xe_gt_sriov_pf_types.h"
>@@ -147,15 +148,7 @@ struct xe_gt {
> 	 * register space, but have their own copy of GSI registers at a
> 	 * specific offset.
> 	 */
>-	struct {
>-		/**
>-		 * @mmio.adj_limit: adjust MMIO address if address is below this
>-		 * value
>-		 */
>-		u32 adj_limit;
>-		/** @mmio.adj_offset: offect to add to MMIO address when adjusting */
>-		u32 adj_offset;
>-	} mmio;
>+	struct xe_mmio mmio;
>
> 	/**
> 	 * @pm: power management info for GT.  The driver uses the GT's
>-- 
>2.45.2
>


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