[PATCH 8/9] drm/xe/ptl: Add performance tuning settings for PTL
Matt Atwood
matthew.s.atwood at intel.com
Fri Sep 6 21:51:52 UTC 2024
From: Matt Roper <matthew.d.roper at intel.com>
The L3SQCREG5 tuning suggestion remains the same on Xe3 as on Xe2.
Bspec: 72161
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
---
drivers/gpu/drm/xe/xe_tuning.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_tuning.c b/drivers/gpu/drm/xe/xe_tuning.c
index faa1bf42e50e..9bb6afaa560a 100644
--- a/drivers/gpu/drm/xe/xe_tuning.c
+++ b/drivers/gpu/drm/xe/xe_tuning.c
@@ -25,15 +25,15 @@ static const struct xe_rtp_entry_sr gt_tunings[] = {
XE_RTP_ACTIONS(SET(XEHP_SQCM, EN_32B_ACCESS))
},
- /* Xe2 */
+ /* Xe2 / Xe3 */
{ XE_RTP_NAME("Tuning: L3 cache"),
- XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED)),
+ XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 3000)),
XE_RTP_ACTIONS(FIELD_SET(XEHP_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,
REG_FIELD_PREP(L3_PWM_TIMER_INIT_VAL_MASK, 0x7f)))
},
{ XE_RTP_NAME("Tuning: L3 cache - media"),
- XE_RTP_RULES(MEDIA_VERSION(2000)),
+ XE_RTP_RULES(MEDIA_VERSION_RANGE(2000, 3000)),
XE_RTP_ACTIONS(FIELD_SET(XE2LPM_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,
REG_FIELD_PREP(L3_PWM_TIMER_INIT_VAL_MASK, 0x7f)))
},
--
2.44.0
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