✗ CI.checkpatch: warning for Add Xe3 and Panther Lake support

[Patchwork]

== Series Details ==

Series: Add Xe3 and Panther Lake support
URL   : https://patchwork.freedesktop.org/series/138349/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c62d7e164862503a3662a095da1c6c9014248cb2
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f5a0f3afa637829a1c6db3042e933f13931c3c6c
Author: Haridhar Kalvala <haridhar.kalvala at intel.com>
Date:   Fri Sep 6 14:51:53 2024 -0700

    drm/xe/ptl: Add PTL platform definition
    
    PTL is an integrated GPU based on the Xe3 architecture.
    
    Bspec: 72574
    
    Cc: Matt Roper <matthew.d.roper at intel.com>
    Signed-off-by: Haridhar Kalvala <haridhar.kalvala at intel.com>
    Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
+ /mt/dim checkpatch 217031ad4c962ee8b1b7ac4b30323b4e2ac6d12a drm-intel
6dcf93d4f441 drm/xe/xe3: Xe3 uses the same PAT settings as Xe2
a14bf898238e drm/xe/xe3: Define Xe3 feature flags
adb1193d312e drm/xe/xe3: Generate and store the L3 bank mask
9e5d4ed4e6fc drm/xe/xe3: Add initial set of workarounds
-:83: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#83: FILE: drivers/gpu/drm/xe/xe_wa.c:601:
+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), FUNC(xe_rtp_match_first_render_or_compute)),

total: 0 errors, 1 warnings, 0 checks, 87 lines checked
39037a1f98f7 drm/xe/xe3: Extend wa_15015404425 for xe3
9ba274ac1866 drm/xe/xe3lpm: Add new "instance0" steering table
-:8: WARNING:REPEATED_WORD: Possible repeated word: 'to'
#8: 
"MEDIAINF" range on Xe3.  Since we can always steer to to grpid /

total: 0 errors, 1 warnings, 0 checks, 29 lines checked
dba781687d47 drm/xe/ptl: PTL re-uses Xe2 MOCS table
46295d37f5cd drm/xe/ptl: Add performance tuning settings for PTL
f5a0f3afa637 drm/xe/ptl: Add PTL platform definition
-:62: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#62: FILE: include/drm/intel/xe_pciids.h:225:
+#define XE_PTL_U_IDS(MACRO__, ...) \
+	MACRO__(0xB090, ## __VA_ARGS__), \
+	MACRO__(0xB0A0, ## __VA_ARGS__)

-:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects?
#62: FILE: include/drm/intel/xe_pciids.h:225:
+#define XE_PTL_U_IDS(MACRO__, ...) \
+	MACRO__(0xB090, ## __VA_ARGS__), \
+	MACRO__(0xB0A0, ## __VA_ARGS__)

-:66: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#66: FILE: include/drm/intel/xe_pciids.h:229:
+#define XE_PTL_IDS(MACRO__, ...) \
+	XE_PTL_P_IDS(MACRO__, ## __VA_ARGS__), \
+	XE_PTL_U_IDS(MACRO__, ## __VA_ARGS__)

-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects?
#66: FILE: include/drm/intel/xe_pciids.h:229:
+#define XE_PTL_IDS(MACRO__, ...) \
+	XE_PTL_P_IDS(MACRO__, ## __VA_ARGS__), \
+	XE_PTL_U_IDS(MACRO__, ## __VA_ARGS__)

total: 2 errors, 0 warnings, 2 checks, 41 lines checked