[PATCH v2 34/43] drm/xe/gt_clock: Convert register access to use xe_mmio

[Rodrigo Vivi]

On Fri, Sep 06, 2024 at 05:08:23PM -0700, Matt Roper wrote:
> Stop using GT pointers for register access.
> 
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt_clock.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_clock.c b/drivers/gpu/drm/xe/xe_gt_clock.c
> index 86c2d62b4bdc..cc2ae159298e 100644
> --- a/drivers/gpu/drm/xe/xe_gt_clock.c
> +++ b/drivers/gpu/drm/xe/xe_gt_clock.c
> @@ -17,7 +17,7 @@
>  
>  static u32 read_reference_ts_freq(struct xe_gt *gt)
>  {
> -	u32 ts_override = xe_mmio_read32(gt, TIMESTAMP_OVERRIDE);
> +	u32 ts_override = xe_mmio_read32(&gt->mmio, TIMESTAMP_OVERRIDE);
>  	u32 base_freq, frac_freq;
>  
>  	base_freq = REG_FIELD_GET(TIMESTAMP_OVERRIDE_US_COUNTER_DIVIDER_MASK,
> @@ -57,7 +57,7 @@ static u32 get_crystal_clock_freq(u32 rpm_config_reg)
>  
>  int xe_gt_clock_init(struct xe_gt *gt)
>  {
> -	u32 ctc_reg = xe_mmio_read32(gt, CTC_MODE);
> +	u32 ctc_reg = xe_mmio_read32(&gt->mmio, CTC_MODE);
>  	u32 freq = 0;
>  
>  	/* Assuming gen11+ so assert this assumption is correct */
> @@ -66,7 +66,7 @@ int xe_gt_clock_init(struct xe_gt *gt)
>  	if (ctc_reg & CTC_SOURCE_DIVIDE_LOGIC) {
>  		freq = read_reference_ts_freq(gt);
>  	} else {
> -		u32 c0 = xe_mmio_read32(gt, RPM_CONFIG0);
> +		u32 c0 = xe_mmio_read32(&gt->mmio, RPM_CONFIG0);
>  
>  		freq = get_crystal_clock_freq(c0);
>  
> -- 
> 2.45.2
>