[PATCH v2 38/43] drm/xe/tlb: Convert register access to use xe_mmio

Rodrigo Vivi rodrigo.vivi at intel.com
Tue Sep 10 18:45:00 UTC 2024


On Fri, Sep 06, 2024 at 05:08:27PM -0700, Matt Roper wrote:
> Stop using GT pointers for register access.
> 

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> index cca9cf536f76..98616de0c5bb 100644
> --- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> +++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
> @@ -274,17 +274,19 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
>  
>  		xe_gt_tlb_invalidation_fence_wait(&fence);
>  	} else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe)) {
> +		struct xe_mmio *mmio = &gt->mmio;
> +
>  		if (IS_SRIOV_VF(xe))
>  			return 0;
>  
>  		xe_gt_WARN_ON(gt, xe_force_wake_get(gt_to_fw(gt), XE_FW_GT));
>  		if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
> -			xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC1,
> +			xe_mmio_write32(mmio, PVC_GUC_TLB_INV_DESC1,
>  					PVC_GUC_TLB_INV_DESC1_INVALIDATE);
> -			xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC0,
> +			xe_mmio_write32(mmio, PVC_GUC_TLB_INV_DESC0,
>  					PVC_GUC_TLB_INV_DESC0_VALID);
>  		} else {
> -			xe_mmio_write32(gt, GUC_TLB_INV_CR,
> +			xe_mmio_write32(mmio, GUC_TLB_INV_CR,
>  					GUC_TLB_INV_CR_INVALIDATE);
>  		}
>  		xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
> -- 
> 2.45.2
> 


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