✓ CI.checkpatch: success for Some correction in the DP Link Training dequence

[Patchwork]

== Series Details ==

Series: Some correction in the DP Link Training dequence
URL   : https://patchwork.freedesktop.org/series/138551/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c62d7e164862503a3662a095da1c6c9014248cb2
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 330dbc61d44753b9678d5c74dba5f6040b1f5998
Author: Arun R Murthy <arun.r.murthy at intel.com>
Date:   Thu Sep 12 10:35:52 2024 +0530

    drm/i915/dp: Include the time taken by AUX Tx for timeout
    
    As per DP spec the timeout for LANE_CHANNEL_EQ_DONE is 400ms. But this
    timeout value is exclusively for the Aux RD Interval and excludes the
    time consumed for the AUX Tx (i.e reading/writing FFE presets). Add
    another 50ms for these AUX Tx to the 400ms timeout.
    
    Signed-off-by: Srikanth V NagaVenkata <nagavenkata.srikanth.v at intel.com>
    Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
+ /mt/dim checkpatch 1b37d4587b45639327eeb4cce29f77d487f7700a drm-intel
4160272fe37f drm/i915/dp: use fsleep instead of usleep_rage for LT
c4403c875ca4 drm/i915/dp: read Aux RD interval after reading the FFE preset
330dbc61d447 drm/i915/dp: Include the time taken by AUX Tx for timeout