[PATCH] drm/xe/pciid: Add new PCI id for ARL

[Jani Nikula]

On Thu, 12 Sep 2024, Lucas De Marchi <lucas.demarchi at intel.com> wrote:
> On Thu, Sep 12, 2024 at 12:20:02PM GMT, Jani Nikula wrote:
>>On Wed, 11 Sep 2024, "Pottumuttu, Sai Teja" <sai.teja.pottumuttu at intel.com> wrote:
>>> On 11-09-2024 14:56, Dnyaneshwar Bhadane wrote:
>>>> Add new PCI id for ARL platform.
>>>>
>>>> Signed-off-by: Dnyaneshwar Bhadane<dnyaneshwar.bhadane at intel.com>
>>>> ---
>>>>   include/drm/intel/xe_pciids.h | 3 ++-
>>>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/include/drm/intel/xe_pciids.h b/include/drm/intel/xe_pciids.h
>>>> index 79001afa7d27d..5758924a5b4ca 100644
>>>> --- a/include/drm/intel/xe_pciids.h
>>>> +++ b/include/drm/intel/xe_pciids.h
>>>> @@ -181,7 +181,8 @@
>>>>   	MACRO__(0x7D41, ## __VA_ARGS__),	\
>>>>   	MACRO__(0x7D51, ## __VA_ARGS__),        \
>>>>   	MACRO__(0x7D67, ## __VA_ARGS__),	\
>>>> -	MACRO__(0x7DD1, ## __VA_ARGS__)
>>>> +	MACRO__(0x7DD1, ## __VA_ARGS__),	\
>>>> +	MACRO__(0xB650, ## __VA_ARGS__)
>>> This should be 0xB640
>>
>>Lucas, Rodrigo, are we getting buy-in for having the PCI ID macros
>>shared between i915 and xe yet...? ;)
>
>
> I acked that series already.

Indeed. Sorry I missed it.

BR,
Jani.

-- 
Jani Nikula, Intel