✓ CI.checkpatch: success for drm/xe/vram: fix ccs offset calculation (rev3)

[Patchwork]

== Series Details ==

Series: drm/xe/vram: fix ccs offset calculation (rev3)
URL   : https://patchwork.freedesktop.org/series/138646/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c62d7e164862503a3662a095da1c6c9014248cb2
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit e6545204377c9b3206013426fbebb8d40e1e0d7e
Author: Matthew Auld <matthew.auld at intel.com>
Date:   Mon Sep 16 09:49:12 2024 +0100

    drm/xe/vram: fix ccs offset calculation
    
    Spec says SW is expected to round up to the nearest 128K, if not already
    aligned for the CC unit view of CCS. We are seeing the assert sometimes
    pop on BMG to tell us that there is a hole between GSM and CCS, as well
    as popping other asserts with having a vram size with strange alignment,
    which is likely caused by misaligned offset here.
    
    v2 (Shuicheng):
     - Do the round_up() on final SW address.
    
    BSpec: 68023
    Fixes: b5c2ca0372dc ("drm/xe/xe2hpg: Determine flat ccs offset for vram")
    Signed-off-by: Matthew Auld <matthew.auld at intel.com>
    Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
    Cc: Akshata Jahagirdar <akshata.jahagirdar at intel.com>
    Cc: Lucas De Marchi <lucas.demarchi at intel.com>
    Cc: Shuicheng Lin <shuicheng.lin at intel.com>
    Cc: Matt Roper <matthew.d.roper at intel.com>
    Cc: <stable at vger.kernel.org> # v6.10+
    Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
    Tested-by: Shuicheng Lin <shuicheng.lin at intel.com>
+ /mt/dim checkpatch 69e534b8a94723926a286f6aa2e2999cd99bcb45 drm-intel
e6545204377c drm/xe/vram: fix ccs offset calculation