✓ CI.checkpatch: success for Xe2 performance tuning updates (rev2)

[Patchwork]

== Series Details ==

Series: Xe2 performance tuning updates (rev2)
URL   : https://patchwork.freedesktop.org/series/138844/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7c393ec5aa2ce3e0af7949e9e3558208e8b1453e
Author: Gustavo Sousa <gustavo.sousa at intel.com>
Date:   Fri Sep 20 14:12:11 2024 -0300

    drm/xe/xe2: Add performance tuning for L3 cache flushing
    
    A recommended performance tuning for LNL related to L3 cache flushing
    was recently introduced in Bspec. Implement it.
    
    v2:
      - Fix reference to Bspec. (Sai Teja, Tejas)
      - Use correct register name for "Tuning: L3 RW flush all Cache". (Sai
        Teja)
      - Use SCRATCH3_LBCF (with the underscore) for better readability.
    
    Bspec: 72161
    Cc: Sai Teja Pottumuttu <sai.teja.pottumuttu at intel.com>
    Cc: Tejas Upadhyay <tejas.upadhyay at intel.com>
    Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
+ /mt/dim checkpatch 128ccc5f71d7b9d84ce8f0651aa713ae490f4990 drm-intel
6432dc524edf drm/xe/mcr: Use Xe2_LPM steering tables for Xe2_HPM
d54aae9cb026 drm/xe/xe2: Extend performance tuning to media GT
9151b8400f5e drm/xe/xe2: Assume tuning settings also apply for future media GT
7c393ec5aa2c drm/xe/xe2: Add performance tuning for L3 cache flushing